APU disabled after context switch in Xilkernel

Hello,

i'm trying to move data between the ppc405-core of a V4FX20 and a
microblaze. The ppc and the microblaze are connected via an FSL link:

PPC-APU <-> FCB <-> FCB2FSL <-> FSL <-> MB

To transfer data the putfsl()/getfsl() functions are used.

The data transfer works flawlessly if the standalone BSP is used on the
PPC. If xilkernel is used on PPC and a task switch occurs between
enabling the APU and calling putfsl()/getfsl() an unknown-instruction
exception is generated. It looks like the MSR is not properly saved
and/or restored.
Is this the case or do i have to do a little more than just set bit 6 in
MSR?


Regards,
Andreas

Are the fsl() functions being invoked in the same task (after a context 
switch) or in a different task?

If in a different task - are you enabling the MSR APU bits prior to the 
kernel being initialized? Global processor level initialization (such as 
MSR, caches and other core registers) should happen before xilkernel_main(). 
This will convey the user's intent regarding the processor state to the 
kernel and ensure that all subsequent task switches get the same MSR value.

Vasanth

"Andreas Hofmann" <ahofmann@ti.cs.uni-frankfurt.de> wrote in message 
news:eeri3h$1t2$1@tantalos.rbi.informatik.uni-frankfurt.de...
> Hello,
>
> i'm trying to move data between the ppc405-core of a V4FX20 and a
> microblaze. The ppc and the microblaze are connected via an FSL link:
>
> PPC-APU <-> FCB <-> FCB2FSL <-> FSL <-> MB
>
> To transfer data the putfsl()/getfsl() functions are used.
>
> The data transfer works flawlessly if the standalone BSP is used on the
> PPC. If xilkernel is used on PPC and a task switch occurs between
> enabling the APU and calling putfsl()/getfsl() an unknown-instruction
> exception is generated. It looks like the MSR is not properly saved
> and/or restored.
> Is this the case or do i have to do a little more than just set bit 6 in
> MSR?
>
>
> Regards,
> Andreas 

Vasanth Asokan schrieb:

Hi,

> Are the fsl() functions being invoked in the same task (after a context 
> switch) or in a different task?

There are two task running: one who invokes the fsl() functions and one
which just spends some CPU time to increment an int value. The latter
task is not necessary, calling sleep() in the task invoking the fsl()
functions leads to similar behaviour because of the context switch to
the idle task.

> If in a different task - are you enabling the MSR APU bits prior to the 
> kernel being initialized? Global processor level initialization (such as 
> MSR, caches and other core registers) should happen before xilkernel_main(). 
> This will convey the user's intent regarding the processor state to the 
> kernel and ensure that all subsequent task switches get the same MSR value.

Caches are disabled and APU is enabled in main() prior to invoking
xilkernel_main(). The task invoking the fsl() functions is statically
defined in the static_pthread_table.

This is the failing code:

//-----------------------------------------------------------------------------
#include "xmk.h"
#include "xparameters.h"
#include "xbasic_types.h"
#include "xcache_l.h"
#include "xpseudo_asm.h"
#include "stdio.h"
#include "pthread.h"

void enable_APU()
{
  Xuint32 msr_value = mfmsr();
  msr_value |= XREG_MSR_APU_AVAILABLE;
  mtmsr(msr_value);
}


void* busy()
{
  int l = 0;

  while( l < (2 << 2) )
  {
    int k = 0;
    while( k < (1 << 18) )
      k++;
    l++;
  }

  return 0;
}

void* user_main()
{

  pthread_t busy_thread;
  pthread_create(&busy_thread, 0, busy, 0);

  print("PPC_CHAT -- Entering user_main() --\r\n");

  // provoke context switch
  yield();

  enable_APU();  // bit is cleared after context switch!
  putfsl(21, 0);

  print("Send succeded.\r\n");

  volatile int i = -1;
  getfsl(i, 0);

  xil_printf("Reply: %d\r\n", i);

  print("PPC_CHAT -- Exiting user_main() --\r\n");

  return 0;
}

int main()
{
  XCache_DisableICache();
  XCache_DisableDCache();

  enable_APU();

  // starting kernel
  xilkernel_main();

  return 0;
}
//-----------------------------------------------------------------------------


Regards,
Andreas

Vasanth Asokan schrieb:

Hi,

> Bug in saving MSR from within system calls. Sample patch attached that fixes 
> the problem.

thanks for the fast supply of the patch. Everything works fine now.

Andreas