Virtex-4 BSCAN

The Virtex-4 data sheet states that the BSCAN module can support 4 
user-data registers.

However there is an Errata sheet which states that early (ES) parts only 
supported one register.

The "Virtex-4 Libraries Guide for HDL Designs" shows a BSCAN_VIRTEX4 
element supporting only one user register (although it mentions USER1 & 
USER2 instructions, suggesting two registers).

The library unisim_VCOMP.vhd shows:

component BSCAN_VIRTEX           -- This drives two user registers
     port
     (
         DRCK1 : out std_ulogic := 'H';
         DRCK2 : out std_ulogic := 'H';
         RESET : out std_ulogic := 'H';
         SEL1 : out std_ulogic := 'L';
         SEL2 : out std_ulogic := 'L';
         SHIFT : out std_ulogic := 'L';
         TDI : out std_ulogic := 'L';
         UPDATE : out std_ulogic := 'L';
         TDO1 : in std_ulogic := 'X';
         TDO2 : in std_ulogic := 'X'
     );
end component;

component BSCAN_VIRTEX4          -- This drives one user register
     generic
     (
         JTAG_CHAIN : integer := 1
     );
     port
     (
         CAPTURE : out std_ulogic := 'H';
         DRCK : out std_ulogic := 'H';
         RESET : out std_ulogic := 'H';
         SEL : out std_ulogic := 'L';
         SHIFT : out std_ulogic := 'L';
         TDI : out std_ulogic := 'L';
         UPDATE : out std_ulogic := 'L';
         TDO : in std_ulogic := 'X'
     );
end component;



So I am confused :)
Can anyone tell me just how many JTAG user registers V4 does support?

David R Brooks schrieb:

> The Virtex-4 data sheet states that the BSCAN module can support 4
> user-data registers.
>
> However there is an Errata sheet which states that early (ES) parts only
> supported one register.
>
> The "Virtex-4 Libraries Guide for HDL Designs" shows a BSCAN_VIRTEX4
> element supporting only one user register (although it mentions USER1 &
> USER2 instructions, suggesting two registers).
>
> The library unisim_VCOMP.vhd shows:
>
> component BSCAN_VIRTEX           -- This drives two user registers
>      port
>      (
>          DRCK1 : out std_ulogic := 'H';
>          DRCK2 : out std_ulogic := 'H';
>          RESET : out std_ulogic := 'H';
>          SEL1 : out std_ulogic := 'L';
>          SEL2 : out std_ulogic := 'L';
>          SHIFT : out std_ulogic := 'L';
>          TDI : out std_ulogic := 'L';
>          UPDATE : out std_ulogic := 'L';
>          TDO1 : in std_ulogic := 'X';
>          TDO2 : in std_ulogic := 'X'
>      );
> end component;
>
> component BSCAN_VIRTEX4          -- This drives one user register
>      generic
>      (
>          JTAG_CHAIN : integer := 1
>      );
>      port
>      (
>          CAPTURE : out std_ulogic := 'H';
>          DRCK : out std_ulogic := 'H';
>          RESET : out std_ulogic := 'H';
>          SEL : out std_ulogic := 'L';
>          SHIFT : out std_ulogic := 'L';
>          TDI : out std_ulogic := 'L';
>          UPDATE : out std_ulogic := 'L';
>          TDO : in std_ulogic := 'X'
>      );
> end component;
>
>
>
> So I am confused :)
> Can anyone tell me just how many JTAG user registers V4 does support?

there are 4
but the way of using them is different then other families
if for others there was one BSCAN primitive that allowed
access to two user instructions, then V4 has

1 primitive
where
>          JTAG_CHAIN : integer := 1

chain number selects which USERx instruction the bscan is linked to

so to access all 4 USERx you instantiate 4 times the same prim
with different generic for chain num

now as of some V4-ES, only chain 1 is useable, others dont work
so they are probably there but can not be used.

notice that on some V4-ES RESET output of the BSCAN has wrong
polarity that also may need special handling.

the 1 chain only issue caused most problems with MDM in the v4-lx25es
where defautl MDM was using non-working chain 2, so there was special
workaround to set MDM ip to use chain 1 and have matching XMD also

Antti
http://www.microfpga.com

Antti wrote:
> David R Brooks schrieb:
> 
>> The Virtex-4 data sheet states that the BSCAN module can support 4
>> user-data registers.
>>
>> However there is an Errata sheet which states that early (ES) parts only
>> supported one register.
>>
>> The "Virtex-4 Libraries Guide for HDL Designs" shows a BSCAN_VIRTEX4
>> element supporting only one user register (although it mentions USER1 &
>> USER2 instructions, suggesting two registers).
>>
>> The library unisim_VCOMP.vhd shows:
>>
>> component BSCAN_VIRTEX           -- This drives two user registers
>>      port
>>      (
>>          DRCK1 : out std_ulogic := 'H';
>>          DRCK2 : out std_ulogic := 'H';
>>          RESET : out std_ulogic := 'H';
>>          SEL1 : out std_ulogic := 'L';
>>          SEL2 : out std_ulogic := 'L';
>>          SHIFT : out std_ulogic := 'L';
>>          TDI : out std_ulogic := 'L';
>>          UPDATE : out std_ulogic := 'L';
>>          TDO1 : in std_ulogic := 'X';
>>          TDO2 : in std_ulogic := 'X'
>>      );
>> end component;
>>
>> component BSCAN_VIRTEX4          -- This drives one user register
>>      generic
>>      (
>>          JTAG_CHAIN : integer := 1
>>      );
>>      port
>>      (
>>          CAPTURE : out std_ulogic := 'H';
>>          DRCK : out std_ulogic := 'H';
>>          RESET : out std_ulogic := 'H';
>>          SEL : out std_ulogic := 'L';
>>          SHIFT : out std_ulogic := 'L';
>>          TDI : out std_ulogic := 'L';
>>          UPDATE : out std_ulogic := 'L';
>>          TDO : in std_ulogic := 'X'
>>      );
>> end component;
>>
>>
>>
>> So I am confused :)
>> Can anyone tell me just how many JTAG user registers V4 does support?
> 
> there are 4
> but the way of using them is different then other families
> if for others there was one BSCAN primitive that allowed
> access to two user instructions, then V4 has
> 
> 1 primitive
> where
>>          JTAG_CHAIN : integer := 1
> 
> chain number selects which USERx instruction the bscan is linked to
> 
> so to access all 4 USERx you instantiate 4 times the same prim
> with different generic for chain num
> 
> now as of some V4-ES, only chain 1 is useable, others dont work
> so they are probably there but can not be used.
> 
> notice that on some V4-ES RESET output of the BSCAN has wrong
> polarity that also may need special handling.
> 
> the 1 chain only issue caused most problems with MDM in the v4-lx25es
> where defautl MDM was using non-working chain 2, so there was special
> workaround to set MDM ip to use chain 1 and have matching XMD also
> 
> Antti
> http://www.microfpga.com
> 
Many thanks!