Instantiating Altera M4K block without MegaWizard

Hello,



I'm trying to write a VHDL video line buffer. I've done this several
times before, but this time I have to write ONE single entity for both
Xilinx and Altera. Selection of the RAM blocks for a design has to be
done using a generic, based on the brand of FPGA. This generic is used
in generate statements to toggle between RAM instances.

For Xilinx, there is no problem. I instantiate a RAMB16_Sm_Sn, and off
I go for a lot of Xilinx devices. I wrap a generate statement around
that and I'm done with the Xilinx job.

But now for Altera. I cannot find a instantiatable primitive called M4K
in the documentation. I really have to use the MegaWizard, which is
fine, but not for this design. Using the wizard would mean that I have
to do it over and over again for each new Altera design, and go through
simulation and verification every time. So there goes the idea of
switching between brands using an generic map.

Has somebody ever found an Altera primitive for internal RAMs?



Best regards,
RadioShox

"RadioShox" <robert.leune@gemidis.be> writes:

> Hello,
> 
Hi,

<snip>
> Has somebody ever found an Altera primitive for internal RAMs?
> 

lpm_ram_* worked for me in the past.

But do you have to instantiate?  If it s a single clock, you can write
code that will infer to RAM blocks in both devices quite easily.

Cheers,
Martin

-- 
martin.j.thompson@trw.com 
TRW Conekt - Consultancy in Engineering, Knowledge and Technology
http://www.conekt.net/electronics.html

   

"Martin Thompson" <martin.j.thompson@trw.com> wrote in message 
news:uhcyhk8u8.fsf@trw.com...
> "RadioShox" <robert.leune@gemidis.be> writes:
>
>> Hello,
>>
> Hi,
>
> <snip>
>> Has somebody ever found an Altera primitive for internal RAMs?
>>
>
> lpm_ram_* worked for me in the past.
>
> But do you have to instantiate?  If it s a single clock, you can write
> code that will infer to RAM blocks in both devices quite easily.

Not to mention that using either lpm_ram_* or writing it yourself would make 
it portable between Xilinx and Altera and probably most other FPGA vendors 
and would not require any sort of generic to 'select' between the two 
non-portable options.

KJ 

Hello,


If I'm not mistaken, lpm_ram_* is a MegaFunction. Or can you just write
it down without running MegaWizard?


Best regards,
Robert.

Robert wrote:
> Hello,
>
>
> If I'm not mistaken, lpm_ram_* is a MegaFunction. Or can you just write
> it down without running MegaWizard?
>
>
> Best regards,
> Robert.

LPM is an EIA standard that is supported by several tool vendors.  From
what I've gathered though Altera was one of the main proponents of the
standard...but that doesn't necessarily dilute the fact that it is an
accepted and implemented standard.  That said, it's not a terribly
impressive set of functions but if you don't have the time to code your
own fifos memories, multipliers and dividers it can be handy and
portable.

KJ

Robert wrote:
> Hello,
>
>
> If I'm not mistaken, lpm_ram_* is a MegaFunction. Or can you just write
> it down without running MegaWizard?
>
>
> Best regards,
> Robert.

LPM is an EIA standard that is supported by several tool vendors.  From
what I've gathered though Altera was one of the main proponents of the
standard...but that doesn't necessarily dilute the fact that it is an
accepted and implemented standard.  That said, it's not a terribly
impressive set of functions but if you don't have the time to code your
own fifos memories, multipliers and dividers it can be handy and
portable.

KJ

RadioShox wrote:
> Hello,
>
> Has somebody ever found an Altera primitive for internal RAMs?
>
The more portable approach is to use Martin's suggestion.

But if you really want to find the Altera primitive just run through
the MegaWizard to produce the VHDL file.  Then simply open that file
and take a look.  What you'll likely find is that the MegaWizard
produced file is a simple wrapper around the Altera primitive that
you're interested in.  From that you can search the Altera help for
documentation on that primitive.  The MegaWizard produced file will
also obviously have an instantiation of that primitive with all of the
generics set up per however it is that you answered things in the
MegaWizard GUI.

KJ

Ah, I understand! And very little information to find on the subject
indeed. Looks like the FPGA vendors really are not interested in
supporting inter-vendor portability...
Well, thanks for the info on LPM functions.


BR,
Robert.

Robert wrote:
> Ah, I understand! And very little information to find on the subject
> indeed. Looks like the FPGA vendors really are not interested in
> supporting inter-vendor portability...

True, but the hdl synthesis manuals
for ISE, Quartus, etc. do show the basic
code templates, and most of these are portable.

       -- Mike Treseler

RadioShox wrote:

> But now for Altera. I cannot find a instantiatable primitive called M4K
> in the documentation. I really have to use the MegaWizard, which is
> fine, but not for this design. Using the wizard would mean that I have
> to do it over and over again for each new Altera design, and go through
> simulation and verification every time. So there goes the idea of
> switching between brands using an generic map.

There's a basic Altera-specific primitive called the ALTSYNCRAM. It's a
generic synchronous RAM component that you can not only parametrize for
width and depth, but also to only include M4Ks, what the maximum block
depth is when generating a RAM block that is larger than an M4K etcetera.

It's pretty well-documented in the Quartus online help.

Best regards,



Ben