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75Mhz Spartan3e microblaze

Started by u_st...@yahoo.de October 8, 2006
hi

i hvea a question about implementing a microblaze with ethernet. i'm
using a spartan 3e 500 an edk8.2. i created a new project with a
microblaze, an ethernet core, sdram, timer debug module an uart. in the
ethernet datasheet it says that in order to be able to use 100MBit the
obp bus hast to run at least with 65 MHz. my problem now is the the
design wont synthesize with more than 59 MHz even if i do multiple
iterations.
can anybody give me a hint what to do?
do i have to set some more constraints or anything else?

thanks
urban

> obp bus hast to run at least with 65 MHz. my problem now is the the > design wont synthesize with more than 59 MHz even if i do multiple > iterations.
you should try using xplorer. Keep the MB cache size to < 8K. /Siva
Hi Urban,

It also depends on what setting you put on MicroBlaze and how your system 
looks like.

If you post your settings for Microblaze from the .mhs file, I can tell you 
if there is anything you should change.

G&#2013266166;ran Bilski

<u_stadler@yahoo.de> wrote in message 
news:1160340640.441443.162960@i3g2000cwc.googlegroups.com...
> hi > > i hvea a question about implementing a microblaze with ethernet. i'm > using a spartan 3e 500 an edk8.2. i created a new project with a > microblaze, an ethernet core, sdram, timer debug module an uart. in the > ethernet datasheet it says that in order to be able to use 100MBit the > obp bus hast to run at least with 65 MHz. my problem now is the the > design wont synthesize with more than 59 MHz even if i do multiple > iterations. > can anybody give me a hint what to do? > do i have to set some more constraints or anything else? > > thanks > urban >
hi


well thanks for the answers. i tried a design with no cach and with
data and instruction cache (2k).  with multiple iterations i meant that
i was using xplorer.
here ist the system.mhs file (with cach) and the system.ucf file

http://www.pfeilheim.sth.ac.at/xilinx/system.mhs
http://www.pfeilheim.sth.ac.at/xilinx/system.ucf

thanks 
urban

One of the problems with OPB is that the more peripherals you add the
slower it goes. All of the control signals data returns from modules
etc are ORed together. There are ways to improve module response to
clock e.g. pipelining the return of data. It is worth looked at the
results in timing analyser to identify problem modules and see if you
can do anything to improve the speed of them.

On the brute force approach try using multiple place and route. Option
can be set in the Placement options in ISE. Also playing with
synthesiser switches - especially hierarchy settings may also help.

John Adair
Enterpoint Ltd.

u_stadler@yahoo.de wrote:
> hi > > i hvea a question about implementing a microblaze with ethernet. i'm > using a spartan 3e 500 an edk8.2. i created a new project with a > microblaze, an ethernet core, sdram, timer debug module an uart. in the > ethernet datasheet it says that in order to be able to use 100MBit the > obp bus hast to run at least with 65 MHz. my problem now is the the > design wont synthesize with more than 59 MHz even if i do multiple > iterations. > can anybody give me a hint what to do? > do i have to set some more constraints or anything else? > > thanks > urban
John Adair schrieb:

> One of the problems with OPB is that the more peripherals you add the > slower it goes. All of the control signals data returns from modules > etc are ORed together. There are ways to improve module response to > clock e.g. pipelining the return of data. It is worth looked at the > results in timing analyser to identify problem modules and see if you > can do anything to improve the speed of them. > > On the brute force approach try using multiple place and route. Option > can be set in the Placement options in ISE. Also playing with > synthesiser switches - especially hierarchy settings may also help. > > John Adair > Enterpoint Ltd. >
John, the OP was already doing multi-pass optimization with the xplorer script and he has pretty much minimal bare bones system so he should be able to meet 65MHz+ timing well there is almost another option ethernet lite requires only 50mhz clock frequency - unfortunatly Petalogix has only released the binary demo with the ethernet lite uclinux drivers (GPL licensed ASFAIK) so the only option currently is really getting the system clock freq above 65 and use full ethernet core Antti
hi

well thanks for all the answers so far.
i 'm still trying to get some more speed out of edk.
well as said before i'm not doing anything fancy. just straight forward
stuff and i was wondering what good the ethernet core is if i can't get
it to synthesize with more than 59 MHz. i have also tried to export it
to ise. i mean there must be a trick somewhere or has nobody used
microblaze with ethernet in a spartan 3e yet?
any suggestions would be very helpful

thanks
urban

u_stadler@yahoo.de wrote:
> hi > > well thanks for all the answers so far. > i 'm still trying to get some more speed out of edk. > well as said before i'm not doing anything fancy. just straight forward > stuff and i was wondering what good the ethernet core is if i can't get > it to synthesize with more than 59 MHz. i have also tried to export it > to ise. i mean there must be a trick somewhere or has nobody used > microblaze with ethernet in a spartan 3e yet? > any suggestions would be very helpful > > thanks > urban >
I was pretty sure someone recently had just that running on the spartan-3e starter board. Uclinux with networking and I think it was microblaze. Look in the archives, like in the last 1-2 months. -Dave -- David Ashley http://www.xdr.com/dash Embedded linux, device drivers, system architecture
David Ashley schrieb:

> u_stadler@yahoo.de wrote: > > hi > > > > well thanks for all the answers so far. > > i 'm still trying to get some more speed out of edk. > > well as said before i'm not doing anything fancy. just straight forward > > stuff and i was wondering what good the ethernet core is if i can't get > > it to synthesize with more than 59 MHz. i have also tried to export it > > to ise. i mean there must be a trick somewhere or has nobody used > > microblaze with ethernet in a spartan 3e yet? > > any suggestions would be very helpful > > > > thanks > > urban > > > > I was pretty sure someone recently had just that running > on the spartan-3e starter board. Uclinux with networking > and I think it was microblaze. Look in the archives, like > in the last 1-2 months. > > -Dave > > -- > David Ashley http://www.xdr.com/dash > Embedded linux, device drivers, system architecture
David you are right there is s3e500 uclinux design from www.petalogix.com but they use ethernet lite that has only 50mhzrequirement. unfrotunatly petalogix is not releasing the ethernet lite driver source codes (GPL !) so other can not use the ethernet lite core with uclinux yet. Antti
David Ashley schrieb:
> u_stadler@yahoo.de wrote: >> hi >> >> well thanks for all the answers so far. >> i 'm still trying to get some more speed out of edk. >> well as said before i'm not doing anything fancy. just straight forward >> stuff and i was wondering what good the ethernet core is if i can't get >> it to synthesize with more than 59 MHz. i have also tried to export it >> to ise. i mean there must be a trick somewhere or has nobody used >> microblaze with ethernet in a spartan 3e yet? >> any suggestions would be very helpful >> >> thanks >> urban >> > > I was pretty sure someone recently had just that running > on the spartan-3e starter board. Uclinux with networking > and I think it was microblaze. Look in the archives, like > in the last 1-2 months.
uClinux does run on the Spartan-3e starter board. If the design doesn't reach at least 65 MHz you can still use the Ethernet core at 10 MBit - 6.5 MHz bus clock is sufficient. Make sure half-/full-duplex and speed is set correctly, because auto negotiation doesn't seem to work reliably. Regards, Andreas