http://www.xilinx.com/prs_rls/2006/silicon_vir/0696v5lxt.htm already pricing given for 1000qty not bad at all. unfortunatly the LXT related user guides ug194 EMAC ug196 GTP ug197 PCIe are all deadlinks at the moment but hopefully those documents become available shortly. new eval boards (besides ML501) are ML505 - allows PCIe testing ML523 - GTP characterization board ML555 - 8x PCIe card GTP has OOB support for PCIe/SATA and supports spread spectrum clocking as well. Antti
Virtex-5 LXT launched today !
Started by ●October 16, 2006
Reply by ●October 16, 20062006-10-16
Antti schrieb:> http://www.xilinx.com/prs_rls/2006/silicon_vir/0696v5lxt.htm > > already pricing given for 1000qty not bad at all. > > unfortunatly the LXT related user guides > ug194 EMAC > ug196 GTP > ug197 PCIe > > are all deadlinks at the moment but hopefully those documents become > available shortly. > > new eval boards (besides ML501) are > > ML505 - allows PCIe testing > ML523 - GTP characterization board > ML555 - 8x PCIe card > > GTP has OOB support for PCIe/SATA and supports spread spectrum clocking > as well. > > Antticorrection ug194 and ug196 are already available (appearead 6 minutes after the post), so the only missing one is the PCIe UG myself
Reply by ●October 16, 20062006-10-16
Hmmm, first in industry with built-in PCI-express? Lattice SCM devices have built-in PCI express, have had since Feb (along with a boat-load of other stuff too). 100mW per channel, finally catching up with Altera and Lattice... S3A may have built-in Flash...seen that before too. It's kinda fun watching Xilinx playing catch-up.... ;) Antti wrote:> Antti schrieb: > > > http://www.xilinx.com/prs_rls/2006/silicon_vir/0696v5lxt.htm > > > > already pricing given for 1000qty not bad at all. > > > > unfortunatly the LXT related user guides > > ug194 EMAC > > ug196 GTP > > ug197 PCIe > > > > are all deadlinks at the moment but hopefully those documents become > > available shortly. > > > > new eval boards (besides ML501) are > > > > ML505 - allows PCIe testing > > ML523 - GTP characterization board > > ML555 - 8x PCIe card > > > > GTP has OOB support for PCIe/SATA and supports spread spectrum clocking > > as well. > > > > Antti > > correction ug194 and ug196 are already available (appearead 6 minutes > after the post), so the only missing one is the PCIe UG > > myself
Reply by ●October 16, 20062006-10-16
Built-in PCIe or built-in SERDES? "ddrinkard" <dale.drinkard@gmail.com> wrote in message news:1161035523.262190.222240@k70g2000cwa.googlegroups.com...> Hmmm, first in industry with built-in PCI-express? Lattice SCM devices > have built-in PCI express, have had since Feb (along with a boat-load > of other stuff too). 100mW per channel, finally catching up with > Altera and Lattice... S3A may have built-in Flash...seen that before > too. It's kinda fun watching Xilinx playing catch-up.... ;)
Reply by ●October 16, 20062006-10-16
dd, Hardened PCIe (in V5). Not a core. Don't see any hardened PCIe on Lattice website. Am I missing something? Not that the Lattice SC products are not nice, they are, and I have acknowledged that a long time ago. But I don't see any hardened PCIe core(s). Is this something they are keeping secret? Austin ddrinkard wrote:> Hmmm, first in industry with built-in PCI-express? Lattice SCM devices > have built-in PCI express, have had since Feb (along with a boat-load > of other stuff too). 100mW per channel, finally catching up with > Altera and Lattice... S3A may have built-in Flash...seen that before > too. It's kinda fun watching Xilinx playing catch-up.... ;) > > > Antti wrote: >> Antti schrieb: >> >>> http://www.xilinx.com/prs_rls/2006/silicon_vir/0696v5lxt.htm >>> >>> already pricing given for 1000qty not bad at all. >>> >>> unfortunatly the LXT related user guides >>> ug194 EMAC >>> ug196 GTP >>> ug197 PCIe >>> >>> are all deadlinks at the moment but hopefully those documents become >>> available shortly. >>> >>> new eval boards (besides ML501) are >>> >>> ML505 - allows PCIe testing >>> ML523 - GTP characterization board >>> ML555 - 8x PCIe card >>> >>> GTP has OOB support for PCIe/SATA and supports spread spectrum clocking >>> as well. >>> >>> Antti >> correction ug194 and ug196 are already available (appearead 6 minutes >> after the post), so the only missing one is the PCIe UG >> >> myself >
Reply by ●October 17, 20062006-10-17
The Lattice parts have hard IP for the MAC and LTSSM (MACO), I'll look more deeply into the LXT, complete endpoint huh? I suppose that has some value. (is this where I'm supposed to cry Uncle?) One might assert it's splitting hairs suggesting other players have nada...but marketing is marketing...and Xilinx didn't get to be a billion dollar company by doing it badly....Since Xilinx is the only one talking about their 65nm products I suppose they are, by default, the defacto leader in that arena. I just wanted to point out that the LXT is not the first FPGA with hardened communications IP blocks, that's all. Sorry to have ruffled your feathers. Those Xilinx parts, they're pretty nice too....and I acknowledged that a long time ago.... ;) Austin Lesea wrote:> dd, > > Hardened PCIe (in V5). Not a core. Don't see any hardened PCIe on > Lattice website. Am I missing something? > > Not that the Lattice SC products are not nice, they are, and I have > acknowledged that a long time ago. But I don't see any hardened PCIe > core(s). Is this something they are keeping secret? > > Austin > > ddrinkard wrote: > > Hmmm, first in industry with built-in PCI-express? Lattice SCM devices > > have built-in PCI express, have had since Feb (along with a boat-load > > of other stuff too). 100mW per channel, finally catching up with > > Altera and Lattice... S3A may have built-in Flash...seen that before > > too. It's kinda fun watching Xilinx playing catch-up.... ;) > > > > > > Antti wrote: > >> Antti schrieb: > >> > >>> http://www.xilinx.com/prs_rls/2006/silicon_vir/0696v5lxt.htm > >>> > >>> already pricing given for 1000qty not bad at all. > >>> > >>> unfortunatly the LXT related user guides > >>> ug194 EMAC > >>> ug196 GTP > >>> ug197 PCIe > >>> > >>> are all deadlinks at the moment but hopefully those documents become > >>> available shortly. > >>> > >>> new eval boards (besides ML501) are > >>> > >>> ML505 - allows PCIe testing > >>> ML523 - GTP characterization board > >>> ML555 - 8x PCIe card > >>> > >>> GTP has OOB support for PCIe/SATA and supports spread spectrum clocking > >>> as well. > >>> > >>> Antti > >> correction ug194 and ug196 are already available (appearead 6 minutes > >> after the post), so the only missing one is the PCIe UG > >> > >> myself > >
Reply by ●October 17, 20062006-10-17
Austin Lesea schrieb:> dd, > > Hardened PCIe (in V5). Not a core. Don't see any hardened PCIe on > Lattice website. Am I missing something? > > Not that the Lattice SC products are not nice, they are, and I have > acknowledged that a long time ago. But I don't see any hardened PCIe > core(s). Is this something they are keeping secret? > > Austin >MACO http://www.latticesemi.com/products/fpga/sc/macoonchipstructuredasicb.cfm 1GbE,10GbE,PCIe,SPI4.2 flexiPCS http://www.latticesemi.com/products/fpga/sc/serdesflexipcs.cfm http://www.latticesemi.com/documents/flexiMac-SC.pdf page 7 Lattice and Xilinx have a little different approuches. Lattice has not full PCIe endpoint in any of the FPGA's but Lattice was the first to have FPGA's with hard-macro support for PCIe, the level of functionality being implemented in hard block is different (smaller part is hardened) Xilinx full PCIe endpoint as hardblock is really qute. It solves the missing 5V PCI issue :) Antti
Reply by ●October 17, 20062006-10-17
Both Aurash John_H wrote:>Built-in PCIe or built-in SERDES? > > >"ddrinkard" <dale.drinkard@gmail.com> wrote in message >news:1161035523.262190.222240@k70g2000cwa.googlegroups.com... > > >>Hmmm, first in industry with built-in PCI-express? Lattice SCM devices >>have built-in PCI express, have had since Feb (along with a boat-load >>of other stuff too). 100mW per channel, finally catching up with >>Altera and Lattice... S3A may have built-in Flash...seen that before >>too. It's kinda fun watching Xilinx playing catch-up.... ;) >> >> > > > >-- __ / /\/\ Aurelian Lazarut \ \ / System Verification Engineer / / \ Xilinx Ireland \_\/\/ phone: 353 01 4032639 fax: 353 01 4640324
Reply by ●October 17, 20062006-10-17
Aurelian Lazarut schrieb:> Both > Aurash > John_H wrote: > > >Built-in PCIe or built-in SERDES? > >Aurash, correct would be built in PCIe compliant SERDES AND PCIe endpoint if PCIe host or hub is required then it must be implemented 100% in FPGA fabric, eg full soft-core Antti
Reply by ●October 17, 20062006-10-17
I *was* asking ddrinkard about the Lattice parts. I had forgotten about the MACO since my recent attention has been on the ECP2M devices. Yes, the new Xilinx parts do the endpoint *and* the SERDES. That's what started the conversation. Aurelian Lazarut wrote:> Both > Aurash > John_H wrote: > >> Built-in PCIe or built-in SERDES? >> >> >> "ddrinkard" <dale.drinkard@gmail.com> wrote in message >> news:1161035523.262190.222240@k70g2000cwa.googlegroups.com... >> >> >>> Hmmm, first in industry with built-in PCI-express? Lattice SCM devices >>> have built-in PCI express, have had since Feb (along with a boat-load >>> of other stuff too). 100mW per channel, finally catching up with >>> Altera and Lattice... S3A may have built-in Flash...seen that before >>> too. It's kinda fun watching Xilinx playing catch-up.... ;)
