Dear all, I am trying to use differential LVPECL interface on Xilinx virtex-II pro device. I have to connect some standard LVPECL(3.3V) signal to virtex-II pro device. But I know that Virtex-II Pro devices support only LVDS_25 and LVPECL_25. There is no problem with Spartan-IIE or Virtex-II device because they have a LVPECL_33 I/O. I want to know how I connect between standard LVPECL(3.3V) signal and virtex-II pro LVPECL_25 signal in differential manner. Could anybody give me some answer ? Thanks, james.
LVPECL_33 to LVPECL_25 (virtex-II pro)
Started by ●December 26, 2003
Reply by ●December 29, 20032003-12-29
James, Check out the input common-mode range (Vicm) and differential input voltage (Vidiff) for LVDSEXT_25. This should meet your requirements depending on the spec of the LVPECL parts you're using. Otherwise, you have to resort to level shifting resistors, or level shifting parts, try Micrel, Maxim, OnSemi etc. cheers mate, Syms. "jicho" <jicho@it.co.kr> wrote in message news:<bsgm6j$q69$1@news.hananet.net>...> Dear all, > > I am trying to use differential LVPECL interface on Xilinx virtex-II pro > device. > > I have to connect some standard LVPECL(3.3V) signal to virtex-II pro device. > But I know that Virtex-II Pro devices support only LVDS_25 and LVPECL_25. > There is no problem with Spartan-IIE or Virtex-II device because they have a > LVPECL_33 I/O. > > I want to know how I connect between standard LVPECL(3.3V) signal and > virtex-II pro LVPECL_25 signal in differential manner. > > Could anybody give me some answer ? > > Thanks, > james.
Reply by ●December 29, 20032003-12-29
On 29 Dec 2003 10:46:52 -0800, symon_brewer@hotmail.com (Symon) wrote:>James, >Check out the input common-mode range (Vicm) and differential input >voltage (Vidiff) for LVDSEXT_25. This should meet your requirements >depending on the spec of the LVPECL parts you're using. >Otherwise, you have to resort to level shifting resistors, or level >shifting parts, try Micrel, Maxim, OnSemi etc. >cheers mate, Syms.I had a similar problem to the OP. Unfortunately, no IO standard on on the (2.5V powered) Virtex2 Pro had a common mode range suitable for 3.3V PECL. My signal was DC balanced, so I capacitively coupled it from the PECL to the FPGA, and used DCI to provide the DC bias and termination on the FPGA side. Regards, Allan.