JTAG pins of the xc2s200E for user I/O

I'm implementing some Image Processing algorithms in VHDL, I'm testing
these algorithms
on the FPGA Spartan IIE xc2s200E. Is there any way to use the JTAG pins

of the xc2s200E for user I/O? I want to download data from the PC, via
a Parallel Port
to JTAG Port on the xc2s200E.

Adriano wrote:
> I'm implementing some Image Processing algorithms in VHDL, I'm testing
> these algorithms
> on the FPGA Spartan IIE xc2s200E. Is there any way to use the JTAG pins
>
> of the xc2s200E for user I/O? I want to download data from the PC, via
> a Parallel Port
> to JTAG Port on the xc2s200E.

not directly but you can use the BSCA primitive to implement
some custom gateway that passes the data to your ip core

Antti

Sorry, but I'm a very beginner of the FPGA technologies. What does "the
BSCA primitive" mean exactly?
Do you know any examples that they could help me??

Thanks.

Antti ha scritto:

> Adriano wrote:
> > I'm implementing some Image Processing algorithms in VHDL, I'm testing
> > these algorithms
> > on the FPGA Spartan IIE xc2s200E. Is there any way to use the JTAG pins
> >
> > of the xc2s200E for user I/O? I want to download data from the PC, via
> > a Parallel Port
> > to JTAG Port on the xc2s200E.
>
> not directly but you can use the BSCA primitive to implement
> some custom gateway that passes the data to your ip core
> 
> Antti

"Adriano" <adrianotamburo@libero.it> schrieb im Newsbeitrag 
news:1161355598.926990.281240@i3g2000cwc.googlegroups.com...
> Sorry, but I'm a very beginner of the FPGA technologies. What does "the
> BSCA primitive" mean exactly?
> Do you know any examples that they could help me??
>
> Thanks.
>
> Antti ha scritto:
>
>> Adriano wrote:
>> > I'm implementing some Image Processing algorithms in VHDL, I'm testing
>> > these algorithms
>> > on the FPGA Spartan IIE xc2s200E. Is there any way to use the JTAG pins
>> >
>> > of the xc2s200E for user I/O? I want to download data from the PC, via
>> > a Parallel Port
>> > to JTAG Port on the xc2s200E.
>>
>> not directly but you can use the BSCA primitive to implement
>> some custom gateway that passes the data to your ip core
>>
>> Antti
>
sorry BSCAN

it allows user logic to added into JTAG chain.
its mostly 'advanced' topic - so there arent much easy to use examples.

you can download the xilinx picoblaze stuff some of the files there use
the BSCAN to load BRAMs over jtag

antti 

Do you know any util links where I can fund materials helping me.

Antti Lukats ha scritto:

> "Adriano" <adrianotamburo@libero.it> schrieb im Newsbeitrag
> news:1161355598.926990.281240@i3g2000cwc.googlegroups.com...
> > Sorry, but I'm a very beginner of the FPGA technologies. What does "the
> > BSCA primitive" mean exactly?
> > Do you know any examples that they could help me??
> >
> > Thanks.
> >
> > Antti ha scritto:
> >
> >> Adriano wrote:
> >> > I'm implementing some Image Processing algorithms in VHDL, I'm testing
> >> > these algorithms
> >> > on the FPGA Spartan IIE xc2s200E. Is there any way to use the JTAG pins
> >> >
> >> > of the xc2s200E for user I/O? I want to download data from the PC, via
> >> > a Parallel Port
> >> > to JTAG Port on the xc2s200E.
> >>
> >> not directly but you can use the BSCA primitive to implement
> >> some custom gateway that passes the data to your ip core
> >>
> >> Antti
> >
> sorry BSCAN
>
> it allows user logic to added into JTAG chain.
> its mostly 'advanced' topic - so there arent much easy to use examples.
>
> you can download the xilinx picoblaze stuff some of the files there use
> the BSCAN to load BRAMs over jtag
> 
> antti

Adriano schrieb:

> Do you know any util links where I can fund materials helping me.
>
> Antti Lukats ha scritto:
>
> > "Adriano" <adrianotamburo@libero.it> schrieb im Newsbeitrag
> > news:1161355598.926990.281240@i3g2000cwc.googlegroups.com...
> > > Sorry, but I'm a very beginner of the FPGA technologies. What does "the
> > > BSCA primitive" mean exactly?
> > > Do you know any examples that they could help me??
> > >
> > > Thanks.
> > >
> > > Antti ha scritto:
> > >
> > >> Adriano wrote:
> > >> > I'm implementing some Image Processing algorithms in VHDL, I'm testing
> > >> > these algorithms
> > >> > on the FPGA Spartan IIE xc2s200E. Is there any way to use the JTAG pins
> > >> >
> > >> > of the xc2s200E for user I/O? I want to download data from the PC, via
> > >> > a Parallel Port
> > >> > to JTAG Port on the xc2s200E.
> > >>
> > >> not directly but you can use the BSCA primitive to implement
> > >> some custom gateway that passes the data to your ip core
> > >>
> > >> Antti
> > >
> > sorry BSCAN
> >
> > it allows user logic to added into JTAG chain.
> > its mostly 'advanced' topic - so there arent much easy to use examples.
> >
> > you can download the xilinx picoblaze stuff some of the files there use
> > the BSCAN to load BRAMs over jtag
> >
> > antti

try
www.xilinx.com
enter picoblaze
click on search

Antti

Do you think that it's possible to develop a bi-directional
communication between FPGA and Computer Host using Picoblaze?
Sorry, but I'm very confused on the way that I can do it.

Antti ha scritto:

> Adriano schrieb:
>
> > Do you know any util links where I can fund materials helping me.
> >
> > Antti Lukats ha scritto:
> >
> > > "Adriano" <adrianotamburo@libero.it> schrieb im Newsbeitrag
> > > news:1161355598.926990.281240@i3g2000cwc.googlegroups.com...
> > > > Sorry, but I'm a very beginner of the FPGA technologies. What does "the
> > > > BSCA primitive" mean exactly?
> > > > Do you know any examples that they could help me??
> > > >
> > > > Thanks.
> > > >
> > > > Antti ha scritto:
> > > >
> > > >> Adriano wrote:
> > > >> > I'm implementing some Image Processing algorithms in VHDL, I'm testing
> > > >> > these algorithms
> > > >> > on the FPGA Spartan IIE xc2s200E. Is there any way to use the JTAG pins
> > > >> >
> > > >> > of the xc2s200E for user I/O? I want to download data from the PC, via
> > > >> > a Parallel Port
> > > >> > to JTAG Port on the xc2s200E.
> > > >>
> > > >> not directly but you can use the BSCA primitive to implement
> > > >> some custom gateway that passes the data to your ip core
> > > >>
> > > >> Antti
> > > >
> > > sorry BSCAN
> > >
> > > it allows user logic to added into JTAG chain.
> > > its mostly 'advanced' topic - so there arent much easy to use examples.
> > >
> > > you can download the xilinx picoblaze stuff some of the files there use
> > > the BSCAN to load BRAMs over jtag
> > >
> > > antti
> 
> try
> www.xilinx.com
> enter picoblaze
> click on search
> 
> Antti

"Adriano" <adrianotamburo@libero.it> schrieb im Newsbeitrag 
news:1161371194.956021.249000@e3g2000cwe.googlegroups.com...
> Do you think that it's possible to develop a bi-directional
> communication between FPGA and Computer Host using Picoblaze?
> Sorry, but I'm very confused on the way that I can do it.

I just gave you a reference where the BSCAN is used.
you can use to implement different kind of protocols
the picoblaze has nothing todo with it, it was just
an example application where BSCAN is used.

if you are confused then read the JTAG stuff
BSCAN allows you to add custom scan chain
in FPGA fabric, whatever you do there its up
to you.

antti