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timing constraints

Started by ram November 21, 2006
In the cyclone devices,
How to set parameters like tco,tsu,th,tpd.I am not using any M4K RAMS
or DSP blocks.I am using for LE_FF timing and LVTTl standards.I am not
using fast corner analysis.I have to fix up hold violations of no 96 I
referred cyclone II device data sheet DC and timing characteristics
page 106-135.How to set this paramters.There are no examples for
this.Can you provide examples for this.If you provide examples for this
in assignment editor ,it will be useful for users
kumar

Kumar,

Please look at

http://www.altera.com/literature/hb/qts/qts_qii53004.pdf

Based on your baord requirements, you need to first spec your I/O
timing requirements, and once you have them, you can use the assignment
editor to enter the assignment. The document should help you understand
the assignments for you to figure out your spec.

As for an example for the assignment editor, here is one for Tsu

- From Column: You can either enter the clock reference or leave empty
- To Column: Enter the name of the pin you want to constraint
- Assignmane Name: "Tsu Requirement"
- Value: <value in ns>

When you are done, click "Start Timing Analysis" and you should see the
Tsu report show slack.

In your QSF file, you will see something like

set_instance_assignment -to mypin -name TSU_REQUIREMENT "5 ns"

Hope this helps,

-David Karchmer
 Altera

ram wrote:
> In the cyclone devices, > How to set parameters like tco,tsu,th,tpd.I am not using any M4K RAMS > or DSP blocks.I am using for LE_FF timing and LVTTl standards.I am not > using fast corner analysis.I have to fix up hold violations of no 96 I > referred cyclone II device data sheet DC and timing characteristics > page 106-135.How to set this paramters.There are no examples for > this.Can you provide examples for this.If you provide examples for this > in assignment editor ,it will be useful for users > kumar