FPGARelated.com
Forums

Re: LVDS output pins of Altera Cyclone II

Started by only...@online.ms December 1, 2006
Hi Rob,

I know that I have to use the assigment editor to change the output type from LVTTL 
(default) to LVDS.

But when using LVTTL I always have access to the "output enable" of the output pin to tri-
state the pin. But this does not work when using LVDS output. 

The output register is always enabled (OE set to '1') when I look at the design with the 
RTL viewer.

This is a little bit strange because actually the Cyclone II parts do not have any "real" 
LVDS outputs. It is standard LVTTL and the LVDS voltage levels are generated by a specific 
set of resitors on the PCB.


--
--------------------------------- --- -- -
Posted with NewsLeecher v3.7 Final
Web @ http://www.newsleecher.com/?usenet
------------------- ----- ---- -- -

Why do you want to tri-state the LVDS outputs?


"tentacle" <onlyspam@online.ms> wrote in message 
news:3ebd3$45708bb0$54964b97$1398@nf16.news-service.com...
> Hi Rob, > > I know that I have to use the assigment editor to change the output type > from LVTTL > (default) to LVDS. > > But when using LVTTL I always have access to the "output enable" of the > output pin to tri- > state the pin. But this does not work when using LVDS output. > > The output register is always enabled (OE set to '1') when I look at the > design with the > RTL viewer. > > This is a little bit strange because actually the Cyclone II parts do not > have any "real" > LVDS outputs. It is standard LVTTL and the LVDS voltage levels are > generated by a specific > set of resitors on the PCB. > > > -- > --------------------------------- --- -- - > Posted with NewsLeecher v3.7 Final > Web @ http://www.newsleecher.com/?usenet > ------------------- ----- ---- -- - >