Digitally Controlled Impedance with Lattice ECP2M FPGA's

Does anyone know if the LATTICE ECP2M FPGA's have on die Digitally
Controlled Impedance (DCI) matching for input LVDS? I am designing a x4
lane PCIe digitiser card with the National 500MSPS ADC and the ECP2M
FPGA. The ADC output 32 pair LVDS and I have read the FPGA datasheet
but there is no mention of DCI??

Thanks
slkjas

JSalk wrote:
> Does anyone know if the LATTICE ECP2M FPGA's have on die Digitally
> Controlled Impedance (DCI) matching for input LVDS? I am designing a x4
> lane PCIe digitiser card with the National 500MSPS ADC and the ECP2M
> FPGA. The ADC output 32 pair LVDS and I have read the FPGA datasheet
> but there is no mention of DCI??
>
> Thanks
> slkjas

I'm pretty sure that the general purpose I/O pins do not
have DCI, but the SERDES receivers have selectable
50 Ohm or 2K ohm differential termination.  Look for
ZRX-TERM in the data sheet.

The LatticeECP2M devices, being a low-cost SERDES solution,  do not
support Digitally Controled Impedance matching for the general purpose
LVDS inputs.  Only the SERDES receivers have the selectable termination
as mentioned by JSalk.  The LatticeSC devices are a full featured
SERDES solution that include among other things, Programmable On-Die
Termination (ODT).  ODT allows the LatticeSC devices to provide the
capibility of to implement many kinds of termination on-chip,
minimizing stub lengths and hence improving performance.

Gabor wrote:
> JSalk wrote:
> > Does anyone know if the LATTICE ECP2M FPGA's have on die Digitally
> > Controlled Impedance (DCI) matching for input LVDS? I am designing a x4
> > lane PCIe digitiser card with the National 500MSPS ADC and the ECP2M
> > FPGA. The ADC output 32 pair LVDS and I have read the FPGA datasheet
> > but there is no mention of DCI??
> >
> > Thanks
> > slkjas
>
> I'm pretty sure that the general purpose I/O pins do not
> have DCI, but the SERDES receivers have selectable
> 50 Ohm or 2K ohm differential termination.  Look for
> ZRX-TERM in the data sheet.