Clock phase shift

Hi,

I need to phase shift (180 deg) an output clock(100MHz) , I have an
option of using DCM and with this it is possible.

Is there any alternative way of implementing clock shift by using any
ready component to implement phase shift.(Xilinx Virtex 4 FPGA). I wish
to avoid using a DCM resource.

I have used IDELAY component while phase shifting an incoming clock but
need similar alternative for o/p clock.

Any suggestions /comments welcome.

Thank you
Ashish

Ashish wrote:

> Hi,
> 
> I need to phase shift (180 deg) an output clock(100MHz) , I have an
> option of using DCM and with this it is possible.
> 
> Is there any alternative way of implementing clock shift by using any
> ready component to implement phase shift.(Xilinx Virtex 4 FPGA). I wish
> to avoid using a DCM resource.
> 
> I have used IDELAY component while phase shifting an incoming clock but
> need similar alternative for o/p clock.
> 
> Any suggestions /comments welcome.
> 
> Thank you
> Ashish
> 
> 

Use an inverter?

It's possible if you have a spare I/O. Basically you send the clock to
output of this spare IO pad and connect the input of the same I/O pad
to IDELAY. You then route the output from the IDELAY to the your
original clock out pad.

Cheers,
Jim
http://home.comcast.net/~jimwu88/tools/

Ashish wrote:
> Hi,
>
> I need to phase shift (180 deg) an output clock(100MHz) , I have an
> option of using DCM and with this it is possible.
>
> Is there any alternative way of implementing clock shift by using any
> ready component to implement phase shift.(Xilinx Virtex 4 FPGA). I wish
> to avoid using a DCM resource.
>
> I have used IDELAY component while phase shifting an incoming clock but
> need similar alternative for o/p clock.
> 
> Any suggestions /comments welcome.
> 
> Thank you
> Ashish

Alan Myler wrote:

> Use an inverter?

I don't think this will result in an exact 180 shifted signal at 100 MHz,
because of the delay of the inverter, so using a DCM is a good idea.

-- 
Frank Buss, fb@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de

Frank Buss wrote:
> Alan Myler wrote:
>
> > Use an inverter?
>
> I don't think this will result in an exact 180 shifted signal at 100 MHz,
> because of the delay of the inverter, so using a DCM is a good idea.

DCM is a always the best option.
I just wanted to avoid using this resource. Using inverter it might not
be exact 180 deg phase shift considering 100 Mhz clock and inverter
delay.


>
> --
> Frank Buss, fb@frank-buss.de
> http://www.frank-buss.de, http://www.it4-systems.de



Is it still possible to use IDELAY component without having to loop
back through IO pad?




Thanks.

Ashish

Frank Buss wrote:
> Alan Myler wrote:
> 
>> Use an inverter?
> 
> I don't think this will result in an exact 180 shifted signal at 100 MHz,
> because of the delay of the inverter, so using a DCM is a good idea.
> 

In virtually every place where the clock is used with X chips, the 
inverter will be absorbed into the IOB/slice and will not result in 
extra delay. Every FF, IO FF, BRAM, etc sticks a mux in front of the 
clock pin, with one inverting and one non-inverting input. There is no 
way to bypass them.

The only consideration I can see when using the inverter method is 
whether the clock is close to a 50% duty cycle.

Ashish, everybody agrees that the DCM is the best solution, but you
never told us why you want to avoid it at any cost.
Peter Alfke

On Dec 6, 7:42 am, "Ashish" <ashish.shringarp...@gmail.com> wrote:
> Frank Buss wrote:
> > Alan Myler wrote:
>
> > > Use an inverter?
>
> > I don't think this will result in an exact 180 shifted signal at 100 MHz,
> > because of the delay of the inverter, so using a DCM is a good idea.DCM is a always the best option.
> I just wanted to avoid using this resource. Using inverter it might not
> be exact 180 deg phase shift considering 100 Mhz clock and inverter
> delay.
>
>
>
> > --
> > Frank Buss, f...@frank-buss.de
> >http://www.frank-buss.de,http://www.it4-systems.deIs it still possible to use IDELAY component without having to loop
> back through IO pad?
> 
> Thanks.
> 
> Ashish

I think the distortion from using inverter and CLK180 is negligible in
Virtex-4.

If imverter an issue, here's another alternative to forward clock out
from Virtex-4.

Note that you always need to use ODDR to forward a clock out.

Usually it's instantiated this way:

ODDR TX_CLK_OUT_00(.Q(PRECLKOUT[0]), .C(CLK), .CE(1'b1), .D1(1'b1),
.D2(1'b0), .R(1'b0), .S(1'b0));

Now you can also do this:

ODDR TX_CLK_OUT_00(.Q(PRECLKOUT[0]), .C(CLK), .CE(1'b1), .D1(1'b0),
.D2(1'b1), .R(1'b0), .S(1'b0));

Notice that I invert the D1 and D2 inputs? This causes 180 phase shift
without changing the CLK input path, as D1 and D2 are logic inputs.

-M

Duane Clark wrote:
> Frank Buss wrote:
> > Alan Myler wrote:
> >
> >> Use an inverter?
> >
> > I don't think this will result in an exact 180 shifted signal at 100 MHz,
> > because of the delay of the inverter, so using a DCM is a good idea.
> >
>
> In virtually every place where the clock is used with X chips, the
> inverter will be absorbed into the IOB/slice and will not result in
> extra delay. Every FF, IO FF, BRAM, etc sticks a mux in front of the
> clock pin, with one inverting and one non-inverting input. There is no
> way to bypass them.
>
> The only consideration I can see when using the inverter method is
> whether the clock is close to a 50% duty cycle.

Hi Peter,

Peter Alfke wrote:
> Ashish, everybody agrees that the DCM is the best solution, but you
> never told us why you want to avoid it at any cost.

I have a clock which will change in runtime(25 Mhz to 50 MHz to 100
MHz)  and expect DCM to take time in locking the clock.

I just wanted a straight 180 deg ph shift  and dont wish to have any
wait period for DCM to lock the o/p.

Please correct me if my understanding is wrong.



> Peter Alfke
>


Thank You

Ashish


> On Dec 6, 7:42 am, "Ashish" <ashish.shringarp...@gmail.com> wrote:
> > Frank Buss wrote:
> > > Alan Myler wrote:
> >
> > > > Use an inverter?
> >
> > > I don't think this will result in an exact 180 shifted signal at 100 MHz,
> > > because of the delay of the inverter, so using a DCM is a good idea.DCM is a always the best option.
> > I just wanted to avoid using this resource. Using inverter it might not
> > be exact 180 deg phase shift considering 100 Mhz clock and inverter
> > delay.
> >
> >
> >
> > > --
> > > Frank Buss, f...@frank-buss.de
> > >http://www.frank-buss.de,http://www.it4-systems.deIs it still possible to use IDELAY component without having to loop
> > back through IO pad?
> > 
> > Thanks.
> > 
> > Ashish

Ashish wrote:
> Hi Peter,
> 
> I have a clock which will change in runtime(25 Mhz to 50 MHz to 100
> MHz)  and expect DCM to take time in locking the clock.
> 
> I just wanted a straight 180 deg ph shift  and dont wish to have any
> wait period for DCM to lock the o/p.
> 
> Please correct me if my understanding is wrong.
> 
> Thank You
> 
> Ashish

Since you have delays of 5, 10, and 20 ns to get 180 degree phase 
shifts, don't try anything funny.

The inverted clock is better than any non-DCM solution in accuracy and 
better than the DCM solution in "lock time" since there is no delay.