Hi guys, I have to produce a PCB with a couple of FPGA on it and I was wondering if the solder mask right under the FPGA would prevent a good heat dissipation (provided that we will put the thermal paste underneath). Some of our designers suggested that the gain you have in heat dissipation you will loose it in short-circuit problems on the mounting, through the via underneath which are much more of a pain. Could you give me any suggestion? Thanks a lot Al -- Alessandro Basili CERN, PH/UGC Hardware Designer
solder mask for fpga dissipation
Started by ●December 18, 2006
Reply by ●December 18, 20062006-12-18
Al wrote:> Hi guys, > I have to produce a PCB with a couple of FPGA on it and I was wondering > if the solder mask right under the FPGA would prevent a good heat > dissipation (provided that we will put the thermal paste underneath). > Some of our designers suggested that the gain you have in heat > dissipation you will loose it in short-circuit problems on the mounting, > through the via underneath which are much more of a pain. > Could you give me any suggestion? > > Thanks a lot > > Al >For BGA or TQFP ? I think CERN is working on big BGA ;-) Laurent www.amontec.com
Reply by ●December 18, 20062006-12-18
AMONTEC wrote:> Al wrote: > >> Hi guys, >> I have to produce a PCB with a couple of FPGA on it and I was >> wondering if the solder mask right under the FPGA would prevent a good >> heat dissipation (provided that we will put the thermal paste >> underneath). Some of our designers suggested that the gain you have in >> heat dissipation you will loose it in short-circuit problems on the >> mounting, through the via underneath which are much more of a pain. >> Could you give me any suggestion? >> >> Thanks a lot >> >> Al >> > > For BGA or TQFP ? > I think CERN is working on big BGA ;-) >Well, it's a Cern official experiment, but it's not going on any beams. It's for space application (AMS-02). Anyway I'm talking about PQFP 208 (Actel A54SX072A). Al -- Alessandro Basili CERN, PH/UGC Hardware Designer
Reply by ●December 18, 20062006-12-18
Al wrote:> AMONTEC wrote: > >> Al wrote: >> >>> Hi guys, >>> I have to produce a PCB with a couple of FPGA on it and I was >>> wondering if the solder mask right under the FPGA would prevent a >>> good heat dissipation (provided that we will put the thermal paste >>> underneath). Some of our designers suggested that the gain you have >>> in heat dissipation you will loose it in short-circuit problems on >>> the mounting, through the via underneath which are much more of a pain. >>> Could you give me any suggestion? >>> >>> Thanks a lot >>> >>> Al >>> >> >> For BGA or TQFP ? >> I think CERN is working on big BGA ;-) >> > > Well, it's a Cern official experiment, but it's not going on any beams. > It's for space application (AMS-02). > Anyway I'm talking about PQFP 208 (Actel A54SX072A). > > Al >...and TQFP 100 (Actel A54SX08A). Al -- Alessandro Basili CERN, PH/UGC Hardware Designer
Reply by ●December 18, 20062006-12-18
Al, You need to do the sums. Find out the:- thickness of the solder mask. the thermal conductivity of the solder mask. the power per unit area going through the solder mask. Are there any physicists where you work? They might be able to help with this calculation. :-) Let us know your answer. I reckon you'll find that the solder mask makes bugger all difference. I certainly wouldn't use a <1 thou thick sheet of solder mask to insulate my house. HTH, Syms. http://en.wikipedia.org/wiki/Thou_%28unit_of_length%29
Reply by ●December 18, 20062006-12-18
Al wrote:> AMONTEC wrote: >> Al wrote: >> >>> Hi guys, >>> I have to produce a PCB with a couple of FPGA on it and I was >>> wondering if the solder mask right under the FPGA would prevent a >>> good heat dissipation (provided that we will put the thermal paste >>> underneath). Some of our designers suggested that the gain you have >>> in heat dissipation you will loose it in short-circuit problems on >>> the mounting, through the via underneath which are much more of a pain. >>> Could you give me any suggestion? >>> >>> Thanks a lot >>> >>> Al >>> >> >> For BGA or TQFP ? >> I think CERN is working on big BGA ;-) >> > > Well, it's a Cern official experiment, but it's not going on any beams. > It's for space application (AMS-02). > Anyway I'm talking about PQFP 208 (Actel A54SX072A). > > Al >The heat dissipation loss will be pretty minimal - my SWAG is a thermal resistance of less (probably much less) than 4C/W but it depends on the material of course. Are you using LPI mask? I know a couple of people I could ask for the actual thermal specs - I'll see if I can hook up with them in the next few days. Cheers PeteS
Reply by ●December 18, 20062006-12-18
PeteS wrote:> Al wrote: >> AMONTEC wrote: >>> Al wrote: >>> >>>> Hi guys, >>>> I have to produce a PCB with a couple of FPGA on it and I was >>>> wondering if the solder mask right under the FPGA would prevent a >>>> good heat dissipation (provided that we will put the thermal paste >>>> underneath). Some of our designers suggested that the gain you have >>>> in heat dissipation you will loose it in short-circuit problems on >>>> the mounting, through the via underneath which are much more of a pain. >>>> Could you give me any suggestion? >>>> >>>> Thanks a lot >>>> >>>> Al >>>> >>> >>> For BGA or TQFP ? >>> I think CERN is working on big BGA ;-) >>> >> >> Well, it's a Cern official experiment, but it's not going on any >> beams. It's for space application (AMS-02). >> Anyway I'm talking about PQFP 208 (Actel A54SX072A). >> >> Al >> > > The heat dissipation loss will be pretty minimal - my SWAG is a thermal > resistance of less (probably much less) than 4C/W but it depends on the > material of course. Are you using LPI mask? > > I know a couple of people I could ask for the actual thermal specs - > I'll see if I can hook up with them in the next few days. > > Cheers > > PeteSIsn't the thermal resistance of air (or vacuum, perhaps, for the CERN folks) that would be between the package and the board be greater than when filling the gap with solder mask? There is a specific, designed gap between the PQFP package and the pins' mounting plane. Any solder mask would help to fill that gap but there will still be a thermal gap. Only if there's a desire to fill the gap with a thermally conductive material should there be a concern about reduced thermal conductivity from solder mask. Perhaps black soldermask would work well for radiated heat transfer?
Reply by ●December 18, 20062006-12-18
John_H <newsgroup@johnhandwork.com> wrote: (snip on thermal conductivity of solder mask for PQFP packaging)> Isn't the thermal resistance of air (or vacuum, perhaps, for the CERN > folks) that would be between the package and the board be greater than > when filling the gap with solder mask? There is a specific, designed > gap between the PQFP package and the pins' mounting plane. Any solder > mask would help to fill that gap but there will still be a thermal gap.> Only if there's a desire to fill the gap with a thermally conductive > material should there be a concern about reduced thermal conductivity > from solder mask. Perhaps black soldermask would work well for radiated > heat transfer?PC boards don't have that much conductivity, either. Maybe a big metal pad would help, but that doesn't help get it out. How about a BeO solder mask? -- glen
Reply by ●December 18, 20062006-12-18
Al wrote:> Al wrote: > >> AMONTEC wrote: >> >>> Al wrote: >>> >>>> Hi guys, >>>> I have to produce a PCB with a couple of FPGA on it and I was >>>> wondering if the solder mask right under the FPGA would prevent a >>>> good heat dissipation (provided that we will put the thermal paste >>>> underneath). Some of our designers suggested that the gain you have >>>> in heat dissipation you will loose it in short-circuit problems on >>>> the mounting, through the via underneath which are much more of a pain. >>>> Could you give me any suggestion? >>>> >>>> Thanks a lot >>>> >>>> Al >>>> >>> >>> For BGA or TQFP ? >>> I think CERN is working on big BGA ;-) >>> >> >> Well, it's a Cern official experiment, but it's not going on any >> beams. It's for space application (AMS-02). >> Anyway I'm talking about PQFP 208 (Actel A54SX072A). >> >> Al >> > ...and TQFP 100 (Actel A54SX08A).Do these have exposed paddles, or are you just looking for PlasticPackage - ThermalPaste - Soldermask - Copper - PCB - More layers etc In that context, you will be better off thermally, by removing the solder mask from the copper areas, IF it has worse conductance than the paste. Most of the thermal work is done by the copper : Leads, PCB area, vias etc. We have used paste-vias, that fill with solder, to improve thermal pathways, and maximal poured copper areas. We have also used black solder mask, tho I'm not sure how much actual dT that finally gave. -jg
Reply by ●December 19, 20062006-12-19
glen herrmannsfeldt wrote:> John_H <newsgroup@johnhandwork.com> wrote: > (snip on thermal conductivity of solder mask for PQFP packaging) > > >>Isn't the thermal resistance of air (or vacuum, perhaps, for the CERN >>folks) that would be between the package and the board be greater than >>when filling the gap with solder mask? There is a specific, designed >>gap between the PQFP package and the pins' mounting plane. Any solder >>mask would help to fill that gap but there will still be a thermal gap. > > > >>Only if there's a desire to fill the gap with a thermally conductive >>material should there be a concern about reduced thermal conductivity >>from solder mask. Perhaps black soldermask would work well for radiated >>heat transfer? > > > PC boards don't have that much conductivity, either. Maybe a big > metal pad would help, but that doesn't help get it out. > > How about a BeO solder mask? > > -- glenHi everyone, I would like to thank you all for your suggestions and a need a bit of time to check them all carefully because I'm not an expert at all in this field. Anyway I think we have to fill the gap with some paste anyway because of the big temperature range of our system (working -25 + 55 �C and -45 +85 for surviving!). If not I think we will have problems with dissipation (moreover we should check carefully at the paste, so that it will not have a big dilatation coefficient, otherwise it will be a problem as well!) Luckily there's a pressurized container which will keep the electronics in a non-vacuum condition, so that we can still rely on conductivity. They've told me that short-circuit may occour easily without solder mask, but I think the best way is to have it on the pads (of course) and then leave a margin to the "heat sink", which will be unmasked, like 2 mm. In this case I will not have problems with short-circuits and I will maximize the heat dissipation. I will go through your technical comments in some time. Thanks guys Al -- Alessandro Basili CERN, PH/UGC Hardware Designer
