FPGA-CPU THROUG ETHERNET

Hi, I am trying to send messages from spartan 3e to pc via ethernet and
viceversa. I have included opb_ethernet in the bsp design but at least
I don't know how to continue it. Any suggestion?

Regard.

Pablo wrote:
> Hi, I am trying to send messages from spartan 3e to pc via ethernet and
> viceversa. I have included opb_ethernet in the bsp design but at least
> I don't know how to continue it. Any suggestion?

Read an app note that shows you how to do it.

http://www.xilinx.com/xlnx/xweb/xil_publications_display.jsp?iLanguageID=1&category=-1211185&sGlobalNavPick=&sSecondaryNavPick=

Cheers,
Jon

Hi Pablo,

I did something very similar last week, but i am working on the Xilinx
Virtex2Pro Board and using the EthenetMacLite on the OPB Bus. I can
outline the steps that you will have to look into:
1. You have instantiated the OPB Ethernet Core ... In EDK8.02 you will
have to first specify that it is a slave on the OPB Bus , then assign
it a address. The first step is trivail.
2. The User Manual of the Spartan Board that you are using will specify
the pin configuration, that is which pins on the FPGA are connected to
the Ethenet PHY chip on board ... You will have to copy these
specifications from the document and paste in the constraints
(system.ucf) file
3. In the Ports tab you have to export all the signals of the Ethernet
core that are interfaced to the PHY chip ... You have to be careful to
name the exported ports as they are named in the user manual and the
ucf file.
4. Use the online Xilinx help to write a small C-code to be downloaded
onto the processor so that it can send packets out through the Ethenet
connection
5. Be sure to connect the Spartan Board and your system through a cross
cable and not the normal ethernet cable.

Venu