Xilinx ISE 8.2

I'm looking for POSITIVE feedback on Xilinx ISE. Yes i realize it has
it problems, but It's free. So, I've been looking round the WWW to find
some tips on what type of system (Windows, Linux, Intel x86 or EM86_64,
AMD, etc) that might result in better software preformace.

Also, considering the effects of the Java RTE.

I would like to post these suggestions to a page on my site, but if
this turns in to a flaming war, i will cease and go elsewhere.

So, here is what I have, and my problems:

I have a Windows XP based system with Xilinx 8.2.03 and Chip Scope Pro.
AMD Athlon 64 3000+
1GB DDR RAM

Here are my issues:

During the hardware validation process, i tend to make many small
changes to several projects (i have 4 FPGAs in my system on seperate
cards all being developed in parallel), esp to CSP which requires many
rebuilds and downloads. Since I'm working with Spartan 2 I cannot take
advantage of Partitioned designs.  After about 10 or so builds and
downloads my physical ram usage is 1.5GB and my system is swappping
consistanly. Reviewing the windows resource usage, it shows only about
150MB for _PN.exe, however, closing the ISE will free up nearly 1GB of
ram.

So, is this a Java issue, should I upgrade my JRE, or does ISE use it's
own JRE?

Is it a System issue, should I switch to a Linux based environment? or
Drop back to an older version of Windows such as w2k.

Could it be a design flaw in my Design. I use a TLD with only IO Logic
and Global Clock buffers, all modules/sub modules contain related
functional logic. TLD only provides wired interconnect between modules,
no tri-state buses. Modules register inputs and outputs on clock edges.

I haved contacted Xilinx on this matter, and will leave it at that to
stay imparital.

Thanks for any feedback.

Brian

"bgshea" <bgshea@gmail.com> writes:
> I'm looking for POSITIVE feedback on Xilinx ISE.

As compared to what?

Xilinx ISE is the best development software for Xilinx FPGAs that
I've ever used.

Eric Smith <eric@brouhaha.com> writes:

> "bgshea" <bgshea@gmail.com> writes:
>> I'm looking for POSITIVE feedback on Xilinx ISE.
>
> As compared to what?
>
> Xilinx ISE is the best development software for Xilinx FPGAs that
> I've ever used.

If by ISE we mean the GUI (as I think we do) then I disagree...

The best development environment I have ever used for Xilinx devices
is Emacs (with vhdl-mode) and a command-line build script :-)

I had problems with ISE crashing when reading files of network drives,
which is what drove me to build scripts, but I'd not go back now!

I still have to use the chipscope core inserter from the GUI
though. When that works off the command-line, we'll really be there!

-- 
martin.j.thompson@trw.com 
TRW Conekt - Consultancy in Engineering, Knowledge and Technology
http://www.conekt.net/electronics.html

   

Martin Thompson wrote:
> If by ISE we mean the GUI (as I think we do) then I disagree...
> 
> The best development environment I have ever used for Xilinx devices
> is Emacs (with vhdl-mode) and a command-line build script :-)

A man after my own heart..

> I had problems with ISE crashing when reading files of network drives,
> which is what drove me to build scripts, but I'd not go back now!

Do you mind sharing your scripts? I have some makefiles I leeched off
someone them hacked up, however I still haven't worked out simulation
properly..

-- 
Daniel O'Connor software and network engineer
for Genesis Software - http://www.gsoft.com.au
"The nice thing about standards is that there
are so many of them to choose from."
  -- Andrew Tanenbaum
GPG Fingerprint - 5596 B766 97C0 0E94 4347 295E E593 DC20 7B3F CE8C

bgshea wrote:
> I'm looking for POSITIVE feedback on Xilinx ISE. Yes i realize it has
> it problems, but It's free. So, I've been looking round the WWW to find
> some tips on what type of system (Windows, Linux, Intel x86 or EM86_64,
> AMD, etc) that might result in better software preformace.
>
> Also, considering the effects of the Java RTE.
>
> I would like to post these suggestions to a page on my site, but if
> this turns in to a flaming war, i will cease and go elsewhere.
>
> So, here is what I have, and my problems:
>
> I have a Windows XP based system with Xilinx 8.2.03 and Chip Scope Pro.
> AMD Athlon 64 3000+
> 1GB DDR RAM
>
> Here are my issues:
>
> During the hardware validation process, i tend to make many small
> changes to several projects (i have 4 FPGAs in my system on seperate
> cards all being developed in parallel), esp to CSP which requires many
> rebuilds and downloads. Since I'm working with Spartan 2 I cannot take
> advantage of Partitioned designs.  After about 10 or so builds and
> downloads my physical ram usage is 1.5GB and my system is swappping
> consistanly. Reviewing the windows resource usage, it shows only about
> 150MB for _PN.exe, however, closing the ISE will free up nearly 1GB of
> ram.
>
> So, is this a Java issue, should I upgrade my JRE, or does ISE use it's
> own JRE?
>
> Is it a System issue, should I switch to a Linux based environment? or
> Drop back to an older version of Windows such as w2k.
>
> Could it be a design flaw in my Design. I use a TLD with only IO Logic
> and Global Clock buffers, all modules/sub modules contain related
> functional logic. TLD only provides wired interconnect between modules,
> no tri-state buses. Modules register inputs and outputs on clock edges.
>
> I haved contacted Xilinx on this matter, and will leave it at that to
> stay imparital.
>
> Thanks for any feedback.
>
> Brian

Brain,

I have the same memory leak problem. But it doesn't seem like many
people have this issue.
At least not posted to this news group or on the Xilinx help. I can not
use any 8.2 because of the
memory leaks and since it is "free" you really can't complain to anyone
at Xilinx. I have been using 7.1.04i
which does the job for me. Version 9.1 is out and I am going to see it
it is any better.

Dave Colson

Brian,

http://tinyurl.com/367qnf

Details the technical answer on this subject.

Austin

Austin Lesea wrote:
> Brian,
> 
> http://tinyurl.com/367qnf
> 
> Details the technical answer on this subject.
> 
> Austin
I am a long time lurker on this newgroup and have learned
a lot from it.  I very much appreciate the presence of Austin
and Peter and the help that they provide.

However, what got me to post this is that the url above just
adds insult to injury regarding ise.  I am a long time user of
Xilinx software starting in about 1991.  For most of that period
the software has been terrible.  The XACT software required you
to reboot after every run, either voluntarily or it would do it
for you.  By the time of the Foundation series, the software was
getting reasonable.  I even bought a copy for my personal use.

ISE has been an experience.  By version 6.3 it was reasonably
good.  It did what I wanted and did not cause too much trouble.
Version 7 was a huge step backwards.  Project navigator got user
surly and very slow.  Whoever did the design never used it for
anything.  Version 8 reached a new low.  The stupid design to
change the project files, later partly removed, made for lots of
headaches.

Fortunately I was spared a lot of the headaches of version 8 since
it would not compile my design.  For a variety of reasons, mostly
historical, a large part of my design is schematics.  There is a
major memory leak in the schvhdl module.  It leaks at about 1mb
per second of cpu time.  Version 7 would complete the xst portion
in about five minutes with a peak memory useage of around 120mb.
Version 8 took an hour or so of time and then crashed at just over
2gb of useage.  There was no way to compile the project and this
was confirmed by Xilinx tech support.  The only "workaround" was
to tell it to compile to verilog instead of vhdl since that memory
leak was not as bad.  Unfortunately this was not an option since
the peak memory useage was just about the 2gb point where the vhdl
conversion failed and blew up the program.

The memory leak was a problem in version 8.1
It was not fixed in 8.1 sp1
It was not fixed in 8.1 sp2
It was not fixed in 8.1 sp3
It was not fixed in 8.2
It was not fixed in 8.2 sp1
It was not fixed in 8.2 sp2
It was not fixed in 8.2 sp3
It was not fixed in 9.1
It was not fixed in 9.1 sp1

So the latest and greatest version 9.1 and its service pack have done
nothing to help make a relatively small design work.  If they are not
going to improve things, why break stuff that was working ok?

Memory leaks come from sloppy programmers.  Not fixing memory leaks
comes from lazy or incompetent programmers.  It is clear that the
programmers did not test their code.  They seem to think that "testing"
means looking to see if it blows up in the first ten seconds.  This is
not some exotic hard to reproduce bug.  Take an 2 input and gate and
put iopins on it.  The memory leak is about 3mb as I recall.  This is
not subtle or hard to find.  They did not even look.  They have not
been looking since it was pointed out and there is no reason to believe
that they have any intention of looking for the leaks.

At one point I sent in a list of fourteen bugs in ise for version 7.
They are all still there plus lots of new ones I have seen in the
little I have been able to use the newer versions.

The conclusion of this is that pointing to a url which just points
out that the programmers did not bother to test their code does
not help the users.  What is needed is to get programmers who know
what they are doing and FIX the problems.

Xilinx support recommended vhdl as it is more portable.  That is true
and will make it easier to take designs to other manufacturers.

WOW, thanks everyone for the input. I'm going to dig though this info
and esp. the links provided.

I would love to see some linux build scripts. I love EMACS!! and use it
for all my c/c++ developement in linux. However, i don't have a PC to
space in my office for linux yet. But i can certainly try on one of my
personal Linux boxes.

ISE has been, IMHO, going down hill. With each new release the projects
become backward incompatible. So what i end up with is many copes of
projects for each new release. I'm not one to binldly trust any
software so when upgrading i always copy my project directory to
/projects/Xilinx_version/project_xxx ensuring a quick esacpe if
something goes wrong.

I can't say i've had many problems with accessing files on network
shares, was that Samba or NFS that was used? This would be nice to
know, if you already stated, i appoligize for not reading everthing
100%.

I going to post this thread on my site, when i get it done, I'll post
the link.

Regards,

Brian

doug wrote:
> Austin Lesea wrote:
> > Brian,
> >
> > http://tinyurl.com/367qnf
> >
> > Details the technical answer on this subject.
> >
> > Austin
> I am a long time lurker on this newgroup and have learned
> a lot from it.  I very much appreciate the presence of Austin
> and Peter and the help that they provide.
>
> However, what got me to post this is that the url above just
> adds insult to injury regarding ise.  I am a long time user of
> Xilinx software starting in about 1991.  For most of that period
> the software has been terrible.  The XACT software required you
> to reboot after every run, either voluntarily or it would do it
> for you.  By the time of the Foundation series, the software was
> getting reasonable.  I even bought a copy for my personal use.
>
> ISE has been an experience.  By version 6.3 it was reasonably
> good.  It did what I wanted and did not cause too much trouble.
> Version 7 was a huge step backwards.  Project navigator got user
> surly and very slow.  Whoever did the design never used it for
> anything.  Version 8 reached a new low.  The stupid design to
> change the project files, later partly removed, made for lots of
> headaches.
>
> Fortunately I was spared a lot of the headaches of version 8 since
> it would not compile my design.  For a variety of reasons, mostly
> historical, a large part of my design is schematics.  There is a
> major memory leak in the schvhdl module.  It leaks at about 1mb
> per second of cpu time.  Version 7 would complete the xst portion
> in about five minutes with a peak memory useage of around 120mb.
> Version 8 took an hour or so of time and then crashed at just over
> 2gb of useage.  There was no way to compile the project and this
> was confirmed by Xilinx tech support.  The only "workaround" was
> to tell it to compile to verilog instead of vhdl since that memory
> leak was not as bad.  Unfortunately this was not an option since
> the peak memory useage was just about the 2gb point where the vhdl
> conversion failed and blew up the program.
>
> The memory leak was a problem in version 8.1
> It was not fixed in 8.1 sp1
> It was not fixed in 8.1 sp2
> It was not fixed in 8.1 sp3
> It was not fixed in 8.2
> It was not fixed in 8.2 sp1
> It was not fixed in 8.2 sp2
> It was not fixed in 8.2 sp3
> It was not fixed in 9.1
> It was not fixed in 9.1 sp1
>
> So the latest and greatest version 9.1 and its service pack have done
> nothing to help make a relatively small design work.  If they are not
> going to improve things, why break stuff that was working ok?
>
> Memory leaks come from sloppy programmers.  Not fixing memory leaks
> comes from lazy or incompetent programmers.  It is clear that the
> programmers did not test their code.  They seem to think that "testing"
> means looking to see if it blows up in the first ten seconds.  This is
> not some exotic hard to reproduce bug.  Take an 2 input and gate and
> put iopins on it.  The memory leak is about 3mb as I recall.  This is
> not subtle or hard to find.  They did not even look.  They have not
> been looking since it was pointed out and there is no reason to believe
> that they have any intention of looking for the leaks.
>
> At one point I sent in a list of fourteen bugs in ise for version 7.
> They are all still there plus lots of new ones I have seen in the
> little I have been able to use the newer versions.
>
> The conclusion of this is that pointing to a url which just points
> out that the programmers did not bother to test their code does
> not help the users.  What is needed is to get programmers who know
> what they are doing and FIX the problems.
>
> Xilinx support recommended vhdl as it is more portable.  That is true
> and will make it easier to take designs to other manufacturers.

> Memory leaks come from sloppy programmers.  Not fixing memory leaks
> comes from lazy or incompetent programmers.

Even incompetent programmers can manage this. The use of valgrind
[http://www.valgrind.org] will pinpoint memory leaks right to the line
where the allocation was made. It runs on unmodified software. This
would be, oh, one hour work maximum if you have the source.

JB

I don't doubt what you are saying about the memory leaks. However, i
have to take in to consideration JAVA, which has no real memory
management, and by this i mean you cannot malloc and free memory,
rather it relys on the fact that you use the new and delete operators.
But even then if it suspects that a block of memory is going to be used
it will not let it go.

As much as i love Firefox it suffers from the same memory leak issues.
About once every 3 or 4 days i have to close out all browsers and free
up about 600MB of memory.

I also cannot blame Xilinx for using JAVA, as it works on my Linux
x86_64 AMD machine (at least i could start the project navagator) with
very little fuss.

I also agree version 8 was a step backward, it added some new icons,
design partitions and a whole bunch of nothing usefull. I have never
had the pleasure of using 6.3 in depth, when i got in to CPLD/FPGAs,
(early 2000) i used CUPL on an Altera Device, and needless to say it
worked very well as a glue logic chip. I think i used Xilinx 6.3 for
about one or 2 months before 7.1 appeared and quiclky switched.

Right now, i would like to find a good method of using the Xilinx
Tools, since I'm using their FPGAs, to conduct long term hardware
validations without restarting all the tools about once every 10
builds.  Yes, i know that i am probably not doing this 100% right and
more simulation could lead to less building but, if i had all the time
in the world to complete my projects i would simulate every last aspect
including my drive to work to ensure it would not effect my coding
style that day, you get what i mean.

So, I ask Martin, as he posted a method of using build scripts, if you
could even if in part, post some of what you use, that might benefit
the community here.  I would certainly build on those scripts and post
them back.

I still have not received a difinitive answer to a key question i had
posted, if anyone knows, can you provide some light on the subject.

Does Xilinx use it's own canned JRE or does it use the installed JRE?

I have just downloaded and installed Java SE Runtime Environment 6 from
Sun, maybe it will help maybe not.

--Brian

On Jan 23, 2:57 pm, "jbnote" <jbn...@gmail.com> wrote:
> > Memory leaks come from sloppy programmers.  Not fixing memory leaks
> > comes from lazy or incompetent programmers.Even incompetent programmers can manage this. The use of valgrind
> [http://www.valgrind.org] will pinpoint memory leaks right to the line
> where the allocation was made. It runs on unmodified software. This
> would be, oh, one hour work maximum if you have the source.
> 
> JB