USB 2.0 Streaming using FPGAs

I'ved used the FX2 with a FPGA for several projects and it has worked 
well,
but... it always take more work than I expect.

>From my experience, the maximum data rate should plan for on the USB 
is
25 to 30 MB/sec, ie, 240 Mbits/sec.  This is far below the 480Mb raw 
data
rate, but I think it's hard to get a lot better than this given the s/
w driver
overhead, etc.

If you project *requires* a data rate near 480Mb/sec, you are probably 
doomed
from the start to failure.

I hope someone has expererience (and tips) that show me to be wrong!

John Providenza


On Jan 30, 5:25 am, pbF...@ludd.invalid wrote:
> billu <bkama...@gmail.com> wrote:
> >Hi All,
> >I was wondering if its possible to stream data at 480Mbps from a PC to
> >a USB 2.0 port on a FPGA development board and send the data out of a
> >SMA port on the board. The XUPV2P board has an onboard USB 2.0 and SMA
> >ports. Can this board be used for this application?
>
> What's your requirements regarding:
>   * Throughout
>   * Latency
>   * Ease of use
>   * Ubiquity

johnp wrote:

>>From my experience, the maximum data rate should plan for on the USB 
> is
> 25 to 30 MB/sec, ie, 240 Mbits/sec.  This is far below the 480Mb raw 
> data
> rate, but I think it's hard to get a lot better than this given the s/
> w driver
> overhead, etc.

And the Windows XP latency can be several seconds.

--
Tim

"johnp" <johnp3+nospam@probo.com> wrote in message 
news:1170169040.672601.99810@m58g2000cwm.googlegroups.com...
>
> I hope someone has expererience (and tips) that show me to be wrong!

I would expect to be able to do data OUT in the high 30s of MB/s without 
much problem but you do need to do big writes, and probably have lots of 
them overlapped and queued.

Of course there's always the possibility that part of your USB capacity has 
been reserved by interrupt or isoch devices, too.

Like you, I find that the FX2 can require a fair amount of sweat and tears 
to get it working, though I have done enough different products with it now 
that I can usuaully find a reasonably example of how to set it up...

Anybody who needs an absolutely unstoppable stream of data at 480MB/s should 
certainly be avoiding a general-purpose desktop OS running a bus at 100% of 
its theoretical capacity.

Will 

Thx for everyones input.

It looks like the PC is going to be the real bottleneck in the whole 
setup. So assuming a maximum data rate of around 240 Mbits/sec, whats 
the best way to interface the PC data stream with the SMA interface. 
This is what came to my mind. Cypress FX2 board takes in a data stream 
from the PC, and the slave fifo interface sends the data to the FPGA. 
The FPGA takes in the data and sends it out through the SMA MGTs. Is 
this reasonable? Any pointers on working with FX2-FPGA board setups. 
Can a Xilinx ML321 board be used?

As far as requirements:
  * Throughout: Maximum possible data rate
  * Latency: Would like it to be small, but not critical
  * Ease of use: Somewhat important, but not the driving factor
  * Ubiquity: Again somewhat important, b/c we would like to 
communicate between PC-PC or PC-Smartphone using a USB port.

Really appreciate everyones response.

On Jan 30, 10:47 am, Tim <s...@nooospam.roockyloogic.com> wrote:
> johnp wrote:
> >>From my experience, the maximum data rate should plan for on the USB
> > is
> > 25 to 30 MB/sec, ie, 240 Mbits/sec.  This is far below the 480Mb raw
> > data
> > rate, but I think it's hard to get a lot better than this given the s/
> > w driver
> > overhead, etc.And the Windows XP latency can be several seconds.
>
> --
> Tim

Nitro wrote:

>>
> 
> I would look at the Xilinx ML403 eval board.  I don't remember the speed of
> the USB but it does have ethernet 10/100/1000 trimode and a a Vertex 4 (and a
> bunch of other I/O's.)  It runs about $500 US

It's USB1.1 only - 12Mbps max.

John

On Jan 30, 1:52 am, Daniel O'Connor <dar...@dons.net.au> wrote:
> billu wrote:
> > Any ideas/pointers on how i can get started on a setup like this. So,
> > the USB 2.0 on the XUPV2P might not be able to support 480Mbps. What
> > USB chipset can I use to get the maximum transfer rate, and how would
> > I interface the chipset w/ the PC/FPGA?
>
> Try looking up the USRP.
>
> That uses a Cypress chip connected to a Cyclone II and appears to work
> reasonably well, although there are plenty of caveats with USB :(

Yes, based on their reported success I'm being very tempted to order
some of the Digilent NEXYS boards which pair the cypress chip with an
XC3S1000 FPGA.   There are some other boards around like the Xylo at
FPGA4FUN, but this is the best deal I've seen so far from a vendor
that won't require trying to talk the purchasing department into
playing with paypal.

Anyone used the NEXYS board?

As for the OP's needed SMA connector - it's a connector for crying out
loud.  Worry about the board  functionality, you can patch any
connector you want on there.  I think digilent even sells a BCD
connector you can plug into one of the expansion ports, and get a BCD
to SMA adapater somewhere.

What are the requirements of the application at a high level?

You need to move data from a PC (hard drive, memory, algorithmically
generated...) to some device (?) using _______ protocol / physical
layer interface..?  Minimum data bandwidth from the PC to the device
is ________?  The device will (not?) communicate/handshake back to the
PC using said protocol?  etc.

-RB

On Jan 30, 11:49 am, "billu" <bkama...@gmail.com> wrote:
> Thx for everyones input.
>
> It looks like the PC is going to be the real bottleneck in the whole
> setup. So assuming a maximum data rate of around 240 Mbits/sec, whats
> the best way to interface the PC data stream with the SMA interface.
> This is what came to my mind. Cypress FX2 board takes in a data stream
> from the PC, and the slave fifo interface sends the data to the FPGA.
> The FPGA takes in the data and sends it out through the SMA MGTs. Is
> this reasonable? Any pointers on working with FX2-FPGA board setups.
> Can a Xilinx ML321 board be used?
>
> As far as requirements:
>   * Throughout: Maximum possible data rate
>   * Latency: Would like it to be small, but not critical
>   * Ease of use: Somewhat important, but not the driving factor
>   * Ubiquity: Again somewhat important, b/c we would like to
> communicate between PC-PC or PC-Smartphone using a USB port.
>
> Really appreciate everyones response.

>It looks like the PC is going to be the real bottleneck in the whole 
>setup. So assuming a maximum data rate of around 240 Mbits/sec, whats 
>the best way to interface the PC data stream with the SMA interface. 
>This is what came to my mind. Cypress FX2 board takes in a data stream 
>from the PC, and the slave fifo interface sends the data to the FPGA. 
>The FPGA takes in the data and sends it out through the SMA MGTs. Is 
>this reasonable? Any pointers on working with FX2-FPGA board setups. 
>Can a Xilinx ML321 board be used?

>As far as requirements:
>  * Throughout: Maximum possible data rate
>  * Latency: Would like it to be small, but not critical
>  * Ease of use: Somewhat important, but not the driving factor
>  * Ubiquity: Again somewhat important, b/c we would like to 
>communicate between PC-PC or PC-Smartphone using a USB port.

If you can be without USB, why not try 1 Gbps Ethernet or Firewire1394 ..?