1 Gbps - state of the art?

Hi all,

I wonder what is curently state-of-the art in serial high-speed transmission 
and what are the prevailing data rates? I know about some SerDes in the 
gigabit-per-second range but I cannot imagine if 10 Gbps are really a 
challenge or the applied method or if it's 1 Gbps (or something in 
between)...?
I recently heard about some 60 GHz in the mobile communication sector and 10 
Gbit Ethernet but as far as I know there are those multi-level modulation 
methods (like QAM for example) that are able to provide 10 Gbit bandwidth 
with a bitrate of some Mbps (is that correct?).
I'm not interested so much in those higher modulation methods (nor in 
optical transmission) but in the baseband communication where bitrate = 
clockrate, i.e. the line rate. What can be efficiently transmitted today 
electrically (over wire or PCB)? What is the prevailing technology of those 
circuits, is it CMOS or are there alternatives?
I am a senior electrical engineer and unfortunately did not manage to keep 
up-to-date. After googling all night I'm really depressed because I finally 
couldn't find an unambiguous answer.
Maybe some guys in the silicon-business or practitioners know the anser and 
are willing to share there knoledge with me?

Best regards
Geronimo 

Geronimo Stempovski wrote:

> I recently heard about some 60 GHz in the mobile communication sector and 10 
> Gbit Ethernet but as far as I know there are those multi-level modulation 
> methods (like QAM for example) that are able to provide 10 Gbit bandwidth 
> with a bitrate of some Mbps (is that correct?).

Last I heard, 10GbaseT runs at 800Mbaud with the gloriously named 
128-DoubleSquare line code. And lots of other clever stuff, such as 
Tomlinson-Harashima precoding, which others on c.a.f. will jump in to 
explain ;-)

So the baud rate (i.e. symbol rate or changes on the line) is 800 
million per second.

Tim

"Geronimo Stempovski" <geronimo.stempovski@arcor.de> wrote in message 
news:45bf1bb4$0$27613$9b4e6d93@newsspool2.arcor-online.net...
> I'm not interested so much in those higher modulation methods (nor in 
> optical transmission) but in the baseband communication where bitrate = 
> clockrate, i.e. the line rate. What can be efficiently transmitted today 
> electrically (over wire or PCB)?

It's around 1Gbps that you really need to start paying attention to your board 
materials, transmission lines, etc.: With inexpensive boards (e.g., FR-4), 
you're at the point where you're starting to get significant loss, dispersion, 
and distance limitations.  Check out this file: 
http://www.xilinx.com/esp/wired/optical/collateral/xaui_xgmii.pdf -- XAUI 
achieves 10Gbps using four 3.125Gbps differential signals (there's overhead on 
each one...), and they manage to run it 20" on cheap PCBs -- that's pretty 
impressive.

Geronimo,

10 Gb/s electrical, or optical is not unusual, and even has been
standardized for many uses (ie SONET/STH OC-192).

Using wavelength division multiplexing there are commercial optical
systems with n times 10 Gb/s channels (each to its own color).

Nothing even fancy here.  ON/OFF keying of the laser diode.  Perhaps as
much as ten years old now.

10 Gb/s electrical is challenging, as you need to transmit the signal
the required distance without loss, noise, reflections, phase
distortion.  That means perhaps 10 meters maximum with exotic material,
exotic electronics; and only a half a meter or less using regular
printed circuit boards and less exotic circuits.

PCI Express is a new standard that now is in every backplane of every
new PC, and offers up to 16 2.5 Gb/s channels.  If that isn't "proof" of
a technology gaining a hold, I don't know what is.

In fact, there are so many applications from 622 Mb/s to ?? Mb/s that it
is difficult to keep track of all of them.

A suggested set of solutions for many of these standards:

http://direct.xilinx.com/bvdocs/userguides/ug196.pdf

and

http://direct.xilinx.com/bvdocs/userguides/ug197.pdf

for PCIe.

You will note all these standards use simple ON/OFF electrical keying,
with no complex signal modulation.  Transmit symbol pre-shaping, and
receive signal equalization is used to maintain the eye opening in most
devices running higher than 3 Gb/s.  Run length codes are used to
prevent long strings of zeroes or ones from being a challenge to IC
designers (8b10b, 64b66b).

Just one more reason why you tend to find a Xilinx FPGA inside just
about every box nowadays.

Austin

Geronimo Stempovski wrote:
> Hi all,
> 
> I wonder what is curently state-of-the art in serial high-speed transmission 
> and what are the prevailing data rates? I know about some SerDes in the 
> gigabit-per-second range but I cannot imagine if 10 Gbps are really a 
> challenge or the applied method or if it's 1 Gbps (or something in 
> between)...?
> I recently heard about some 60 GHz in the mobile communication sector and 10 
> Gbit Ethernet but as far as I know there are those multi-level modulation 
> methods (like QAM for example) that are able to provide 10 Gbit bandwidth 
> with a bitrate of some Mbps (is that correct?).
> I'm not interested so much in those higher modulation methods (nor in 
> optical transmission) but in the baseband communication where bitrate = 
> clockrate, i.e. the line rate. What can be efficiently transmitted today 
> electrically (over wire or PCB)? What is the prevailing technology of those 
> circuits, is it CMOS or are there alternatives?
> I am a senior electrical engineer and unfortunately did not manage to keep 
> up-to-date. After googling all night I'm really depressed because I finally 
> couldn't find an unambiguous answer.
> Maybe some guys in the silicon-business or practitioners know the anser and 
> are willing to share there knoledge with me?
> 
> Best regards
> Geronimo 
> 
> 

In terms of bitrates, then I designed a board with serial links at 5Gb/s 
*per pair* a couple of years ago. Before that I designed some switches 
and gateways with 2.5Gb/s pairs (lots and lots of them). PCI Express has 
just released the 5Gb/s signalling revision (within the last month or 
so, I believe). The things I designed a few years ago were Infiniband 
(my name is actually one of many on the latest spec).

Over FR4 (or other materials less than totally exotic) 5Gb/s is about 
the most you'll get except for _very_ short runs, and as Joel notes 
everything's a transmission line at those rates. I've seen 2.5Gb/s 
Infiniband on a 4x cable (4 pairs in each direction) achieve 10 metres 
within the signalling budget. At 5Gb/s things are more difficult.

10G ethernet is actually 4 signals, incidentally.

So state of the art in terms of practical, shipping and costs less than 
a trip to the moon is currently in the 5Gb/s per pair range.

Cheers

PeteS

PeteS wrote:
> 
> In terms of bitrates, then I designed a board with serial links at 5Gb/s 
> *per pair* a couple of years ago. Before that I designed some switches 
> and gateways with 2.5Gb/s pairs (lots and lots of them). PCI Express has 
> just released the 5Gb/s signalling revision (within the last month or 
> so, I believe). 

Latest boasting on this is here
http://www.altera.com/corporate/news_room/releases/products/nr-pcie2.html?f=hp&k=wn2

and here

http://www.xilinx.com/prs_rls/2007/silicon_vir/0706_V5PCIe-compliance.htm

I presume there _is_ some important BER threshold to set the distance, 
and that this fluff is marketing's effort :

".. reliably transmit data over an unprecedented 30 m "

- how 'reliably' exactly ? - giving a distance without any error rate is
getting a bit slack...

I also see they spec thus "5-GT/s PCIe 2.0 specification"

( Transistions per second )which seems more sensible than Gbps.

-jg

Jim Granville wrote:
> PeteS wrote:
>>
>> In terms of bitrates, then I designed a board with serial links at 
>> 5Gb/s *per pair* a couple of years ago. Before that I designed some 
>> switches and gateways with 2.5Gb/s pairs (lots and lots of them). PCI 
>> Express has just released the 5Gb/s signalling revision (within the 
>> last month or so, I believe). 
> 
> Latest boasting on this is here
> http://www.altera.com/corporate/news_room/releases/products/nr-pcie2.html?f=hp&k=wn2 
> 
> 
> and here
> 
> http://www.xilinx.com/prs_rls/2007/silicon_vir/0706_V5PCIe-compliance.htm
> 
> I presume there _is_ some important BER threshold to set the distance, 
> and that this fluff is marketing's effort :
> 
> ".. reliably transmit data over an unprecedented 30 m "
> 
> - how 'reliably' exactly ? - giving a distance without any error rate is
> getting a bit slack...
> 
> I also see they spec thus "5-GT/s PCIe 2.0 specification"
> 
> ( Transistions per second )which seems more sensible than Gbps.

Actually, I think it's Transfers per second (which for NRZ data is the 
same as the bit rate). That's commonly used in HT (formerly LDT) for the 
data rate.


> 
> -jg
> 

Well, I have seen 2.5Gb/s go 17 metre with 10dB loss and that was 5 
years ago; the new distance looks to be a single lane which might sound 
good to the marketdroids, but isn't much use or very practical.

Note that the later versions of the specifications don't put a loss 
limit, but rather refer to eye closure (at least that's true for IB).

To claim compliance, the link has to exhibit <1E-12 BER, at least for 
earlier versions. As I don't have a copy of the PCI-e 2.0 spec I'll 
assume (as a SWAG) that's still true.

Cheers

PeteS

>You will note all these standards use simple ON/OFF electrical keying,
>with no complex signal modulation.  Transmit symbol pre-shaping, and
>receive signal equalization is used to maintain the eye opening in most
>devices running higher than 3 Gb/s.  Run length codes are used to
>prevent long strings of zeroes or ones from being a challenge to IC
>designers (8b10b, 64b66b).

What's the thumb rule limit of electrical "on-off" signaling with current
fpgas? (length, FR4/Cat.5, speed etc..)

I did some calculations on ordinary S-ATA, should be able to run through
5 meters of cat.5 just barely (maybe I missed something ;).

>Just one more reason why you tend to find a Xilinx FPGA inside just
>about every box nowadays.

Doesn't the competition have anything substantial to come with?

"Joel Kolstad" <JKolstad71HatesSpam@yahoo.com> wrote in message
news:12rv0de39jkcp74@corp.supernews.com...
> "Geronimo Stempovski" <geronimo.stempovski@arcor.de> wrote in message
> news:45bf1bb4$0$27613$9b4e6d93@newsspool2.arcor-online.net...
> > I'm not interested so much in those higher modulation methods (nor in
> > optical transmission) but in the baseband communication where bitrate =
> > clockrate, i.e. the line rate. What can be efficiently transmitted today
> > electrically (over wire or PCB)?
>
> It's around 1Gbps that you really need to start paying attention to your board
> materials, transmission lines, etc.: With inexpensive boards (e.g., FR-4),
> you're at the point where you're starting to get significant loss, dispersion,
> and distance limitations.

If you can get the physical size of the circuit well below one wavelength then
things becomes "simply" DC again (Well worth doing if you, say, happen to be
building a RADAR front-end).

"> Doesn't the competition have anything substantial to come with?"

Competition is always there.

Just visit the each vendor's websites to see their offerings.  Not every
implementation is the same:  some use more power, some less.  Some have
more built in hardware function, some less.  Xilinx may have been the
first to place the gigabit transceivers on a FPGA, but that was years
ago now, and offerings of FPGA with transceivers is common today.

I would like to think that PCIe+MGT+65nm+lowest power (Virtex 5 LX, LXT
shipping NOW) is a substantial offering, and the soonest any serious
competition is expected (from their hasty press releases) is late this
year (end of 2007).

So the simple answer for 65nm?

No, Xilinx is now one full year ahead of its competition.  There is
absolutely no competition for a 65nm FPGA socket.  We are shipping, and
no one else is, nor will they be for a very long time.

If you mean does anyone have gigabit transceivers, then the answer is
yes, and there is plenty of competition.

Austin