We use in a laboratory course still XILINX XC3000 FPGAs with Viewlogic's Workview design entry (DOS version) and XILINX XACT (also DOS). The problem is that we have to replace the old PC's and that Viewlogic only supports a few graphics modes and it is unlikely that it will run on new PC's. The last version of XILINX ISE software which supports XC3000 FPGA's isn't an alternative (and I'm not sure whether it will run on W2k/XP) because the system must be extremely easy to use so the students are able to design and implement a simple CPU in about 10 hours (including the time to learn how to use the schematic entry and simulation tool). Some questions: 1. I have tried to find an actual FPGA with a package which can be soldered with a non professional equipment, something like a PLCC84 where you can get cheap sockets which can be used on self made PCBs and if possible with a VCC of 5 V to easy interface with external TTL logic. XILINX and ACTEL only offers packages with a pin distance of 0.5 mm. ATMEL's AT40K20 would fulfill this requirements but I'm not sure if this architecture is still supported (ATMEL's documentation is five years old) and whether there exists good development software. - has anybody experience with ATMEL's AT40K20 and can suggest development software (it must be a schematic entry, no VHDL because the students have to "see" the processor at gate level. - does anybody know other FPGAs which could be used (or is the hobby market completely uninteresting for the manufactures). 2. Was somebody able to run Viewlogic (DOS version) in a virtual PC emulation. The problem is, the virtual PC must provide the proper graphics mode, mouse type and support a physical dongle on the virtual parallel port. Here a description of the students project: ftp://137.193.64.130/pub/mproz/mproz_e.pdf
FPGA with 5V and PLCC package
Started by ●March 20, 2007
Reply by ●March 20, 20072007-03-20
Herbert Kleebauer wrote: <snip>> 2. Was somebody able to run Viewlogic (DOS version) in a virtual > PC emulation. The problem is, the virtual PC must provide > the proper graphics mode, mouse type and support a physical > dongle on the virtual parallel port.Do you have electronics recycling centers in your region? In the U.S., these places accumulate vast quantities of serviceable (usable) laptops which would be ideal platforms for the ongoing hosting of the DOS software, and one can obtain quantities of the machines for next to nothing. Also, it would be an interesting experiment to try running the software on a VMWare MSDOS VM (a no-cost experiment); please report the results! Regards, Michael
Reply by ●March 20, 20072007-03-20
"Herbert Kleebauer" <klee@unibwm.de> wrote in message news:46000A78.F8457E53@unibwm.de...> We use in a laboratory course still XILINX XC3000 FPGAs with > Viewlogic's Workview design entry (DOS version) and XILINX > XACT (also DOS). The problem is that we have to replace the > old PC's and that Viewlogic only supports a few graphics modes > and it is unlikely that it will run on new PC's. The last > version of XILINX ISE software which supports XC3000 FPGA's > isn't an alternative (and I'm not sure whether it will > run on W2k/XP) because the system must be extremely easy to > use so the students are able to design and implement a simple > CPU in about 10 hours (including the time to learn how to use > the schematic entry and simulation tool). >Hi Herbert, If it's OK, I have an observation. I wonder why these students are being taught design methods on design tools and FPGA parts that most folks on this newsgroup haven't used for a long time. The schematic vs. HDL wars have long since died down because modern FPGA designs are generally 'better' implemented using HDLs. Anyway, I'm sure you have a good reason for the approach you outline; I'm interested as to what this is. If you can post your goals, maybe the group could suggest some up-to-date alternatives? Best regards, Syms. p.s. I HATE Viewlogic. I wasted a day on a legacy design a while back because a wire had the wrong shaped dot on it. The worst part was the bloody software guy spotted the mistake!
Reply by ●March 20, 20072007-03-20
On Mar 20, 11:23 am, Herbert Kleebauer <k...@unibwm.de> wrote:> The last > version of XILINX ISE software which supports XC3000 FPGA's > isn't an alternative (and I'm not sure whether it will > run on W2k/XP) because the system must be extremely easy to > use so the students are able to design and implement a simple > CPU in about 10 hours (including the time to learn how to use > the schematic entry and simulation tool).As a suggestion, drop the schematic entry approach and introduce a hardware design language such as Verilog, or VHDL, or some academic invention that can be translated - these are much more powerful and extensible to real world applications. They are also much more portable. Seperate the simulation solution from the hardware implementation. That should give you many choices, both commerical and free/open source, on many platforms - with no lock-in to the FPGA hardware vendor. Finally, for the actual implementation in an FPGA, try to give them an already canned project file to which they simply add their HDL source code. Ideally their HDL has already been vetted by the simulator and shouldn't have errors, but learning how to click on an error in the window to be taken to the offending line should not be complicate - much simpler than learning about any schematic entry tool. Alternatively, set it up with command line tools and a makefile type environment. You should be able to fit a project of this scope into the free- license versions of tools, so even if you do end up having to use an emulated environment to run old software, dongles at least wouldn't be an issue.
Reply by ●March 20, 20072007-03-20
Herbert Kleebauer wrote:> We use in a laboratory course still XILINX XC3000 FPGAs with > Viewlogic's Workview design entry (DOS version) and XILINX > XACT (also DOS). The problem is that we have to replace the > old PC's and that Viewlogic only supports a few graphics modes > and it is unlikely that it will run on new PC's. The last > version of XILINX ISE software which supports XC3000 FPGA's > isn't an alternative (and I'm not sure whether it will > run on W2k/XP) because the system must be extremely easy to > use so the students are able to design and implement a simple > CPU in about 10 hours (including the time to learn how to use > the schematic entry and simulation tool).What are the prime teaching targets: learning FPGA flows, or learning shematic entry ?> > Some questions: > > 1. I have tried to find an actual FPGA with a package which can > be soldered with a non professional equipment, something like > a PLCC84 where you can get cheap sockets which can be used on > self made PCBs and if possible with a VCC of 5 V to easy interface > with external TTL logic. XILINX and ACTEL only offers packages with > a pin distance of 0.5 mm. ATMEL's AT40K20 would fulfill this > requirements but I'm not sure if this architecture is still > supported (ATMEL's documentation is five years old) and whether > there exists good development software.Isn't '5 years old', actually new on your time scales ? Get the Atmel tools and try them> > - has anybody experience with ATMEL's AT40K20 and can suggest > development software (it must be a schematic entry, no VHDL > because the students have to "see" the processor at gate level.What about simpler HDLs, like CUPL or ABEL ? With those, you can 'see' the AND and OR terms ? What about 'seeing' the result in the report files - is that gate-level enough ?> > - does anybody know other FPGAs which could be used (or is the > hobby market completely uninteresting for the manufactures).Your best pathway into new devices, is a daughter card approach. Put the 'CPU'/REG/CAPS on a tiny PCB, with pin headers.> > > 2. Was somebody able to run Viewlogic (DOS version) in a virtual > PC emulation. The problem is, the virtual PC must provide > the proper graphics mode, mouse type and support a physical > dongle on the virtual parallel port.Keys on virtual parallel ports ?! Nope...> > > Here a description of the students project: > ftp://137.193.64.130/pub/mproz/mproz_e.pdfInteresting, a 3 opcode CPU. I'd look at the CPLDs, and which devices support simpler HDLs CUPL/ABEL, or even Altera's AHDL - the biggest FPGAs are all Verilog/VHDL flows, but you are looking at the simpler end of the scale, so a simpler HDL might fit the teaching targets better. Atmel have up to ATF1508, which could do a 3 opcode CPU, but maybe not this one, if you want to clone the SCHs precisely, as there seems to be many layers of logic. Xilinx have XC95xx and Coolrunner II, I think with ABEL flows on all CPLDs, Lattice have IspMACH4000 family, and Abel in their CPLD flows. -jg
Reply by ●March 20, 20072007-03-20
Herbert Going sideways on what you are looking for it is worth looking at a couple of ideas from our product line to allow the easy use of modern FPGAs. The first is our Craignell family http://www.enterpoint.co.uk/component_replacements/craignell.html which operate from 5V, in a DIL format, and are fully 5V tolerant. At the moment we do 32,36,40 pin versions but I expect to have 28 and 48 pin versions added to the range. Maybe a few others if someone gives us a good reason. Almost a bigger brother our product Darnaw1 is waiting in our lab for a couple of days test before it goes into mass manufacture. This is a 2.54mm pitch PGA style module that lets you use a XC3S1200E/1600E Spartan. This module is 3.3V tolerant and operates from a single 3.3V input. The module also has spi flash and sdram to allow the implementation of fairly powerful processor applications. If you like the concepts of these modules have a look at our university program (UAP). It offers discount and various other academic support things. Details here http://www.enterpoint.co.uk/uap/uap.html. John Adair Enterpoint Ltd. On 20 Mar, 16:23, Herbert Kleebauer <k...@unibwm.de> wrote:> We use in a laboratory course still XILINX XC3000 FPGAs with > Viewlogic's Workview design entry (DOS version) and XILINX > XACT (also DOS). The problem is that we have to replace the > old PC's and that Viewlogic only supports a few graphics modes > and it is unlikely that it will run on new PC's. The last > version of XILINX ISE software which supports XC3000 FPGA's > isn't an alternative (and I'm not sure whether it will > run on W2k/XP) because the system must be extremely easy to > use so the students are able to design and implement a simple > CPU in about 10 hours (including the time to learn how to use > the schematic entry and simulation tool). > > Some questions: > > 1. I have tried to find an actual FPGA with a package which can > be soldered with a non professional equipment, something like > a PLCC84 where you can get cheap sockets which can be used on > self made PCBs and if possible with a VCC of 5 V to easy interface > with external TTL logic. XILINX and ACTEL only offers packages with > a pin distance of 0.5 mm. ATMEL's AT40K20 would fulfill this > requirements but I'm not sure if this architecture is still > supported (ATMEL's documentation is five years old) and whether > there exists good development software. > > - has anybody experience with ATMEL's AT40K20 and can suggest > development software (it must be a schematic entry, no VHDL > because the students have to "see" the processor at gate level. > > - does anybody know other FPGAs which could be used (or is the > hobby market completely uninteresting for the manufactures). > > 2. Was somebody able to run Viewlogic (DOS version) in a virtual > PC emulation. The problem is, the virtual PC must provide > the proper graphics mode, mouse type and support a physical > dongle on the virtual parallel port. > > Here a description of the students project:ftp://137.193.64.130/pub/mproz/mproz_e.pdf
Reply by ●March 20, 20072007-03-20
Herbert Kleebauer wrote:> We use in a laboratory course still XILINX XC3000 FPGAs with > Viewlogic's Workview design entry (DOS version) and XILINX > XACT (also DOS). The problem is that we have to replace the > old PC's and that Viewlogic only supports a few graphics modes > and it is unlikely that it will run on new PC's. The last > version of XILINX ISE software which supports XC3000 FPGA's > isn't an alternative (and I'm not sure whether it will > run on W2k/XP) because the system must be extremely easy to > use so the students are able to design and implement a simple > CPU in about 10 hours (including the time to learn how to use > the schematic entry and simulation tool). > > Some questions: > > 1. I have tried to find an actual FPGA with a package which can > be soldered with a non professional equipment, something like > a PLCC84 where you can get cheap sockets which can be used on > self made PCBs and if possible with a VCC of 5 V to easy interface > with external TTL logic. XILINX and ACTEL only offers packages with > a pin distance of 0.5 mm. ATMEL's AT40K20 would fulfill this > requirements but I'm not sure if this architecture is still > supported (ATMEL's documentation is five years old) and whether > there exists good development software. > > - has anybody experience with ATMEL's AT40K20 and can suggest > development software (it must be a schematic entry, no VHDL > because the students have to "see" the processor at gate level. > > - does anybody know other FPGAs which could be used (or is the > hobby market completely uninteresting for the manufactures). > > > 2. Was somebody able to run Viewlogic (DOS version) in a virtual > PC emulation. The problem is, the virtual PC must provide > the proper graphics mode, mouse type and support a physical > dongle on the virtual parallel port. > > > Here a description of the students project: > ftp://137.193.64.130/pub/mproz/mproz_e.pdfThis is such a simple CPU, that I quickly tried it targeting the ATF1508 - which _is_ 5V and _is_ PLCC84, so you can keep all your design notes, and just re-map the pins on the PCB layout you have. Below is the CUPL code (minus STEU and full adder), which is close enough to registers that the students should be able to "see" the processor at gate level. This FITs with 46 spare macrocells in an ATF1508, which should be plenty to complete the adder, and STEU state engine. As you can see, this is probably easier to read than the SCHs, 8 blocks in the main diagram become 8 (very simple) equation sets. FIELD Sta = [Sta2..Sta0]; FIELD Din = [Din15..Din0]; FIELD Adr = [Adr15..Adr0]; FIELD PC = [PC15..PC0]; FIELD XReg = [XReg15..XReg0]; FIELD YReg = [YReg15..YReg0]; FIELD XGate = [XGate15..XGate0]; FIELD YGate = [YGate15..YGate0]; FIELD ALU = [ALU15..ALU0]; /* ~~~~~~~~~ XReg, YReg, PC Simple Registers ~~~~~~~~~~~~ */ XReg.d = Din; XReg.ck = CLK; XReg.ce = s1; YReg.d = Din; YReg.ck = CLK; YReg.ce = s2; PC.d = ALU; PC.ck = CLK; PC.ce = s3; /* ~~~~~~~~~~~~~~~~ Adr is AMUX out ~~~~~~~~~~~~~~ */ /* AMUX: IF (s4=0) THEN out=in1 ELSE out=in2 */ Adr = s4 & YReg # !s4 & PC; /* ~~~~~~~~~~~~~~~~ XGate, YGate ~~~~~~~~~~~~~~~~~ */ /* XGATE: IF (s5=0) THEN out=$0000 ELSE out=in */ XGate = s5 & XReg # !s5 & 'h'0000; /* YGATE: IF (s6=0) THEN out=$0001 ELSE out=in */ YGate = s6 & YReg # !s6 & 'h'0001; /* ~~~~~~~~~~~~~~~ ALU, pre-adder ~~~~~~~~~~~~~~~~~ */ /* ALU: IF (s7=0) THEN out=in1 ADD in2 , F=carry ELSE out=in1 NOR in2 , F=zero */ ALU = s7 & !(XGate # YGate) # !s7 & (XGate $ YGate); /* Dummy, until adder done */ F.d = s7 & 'b'0 # !s7 & (XGate0 $ YGate0); /* Dummy, until adder-CY done */ F.ck = CLK; F.ce = s8;
Reply by ●March 21, 20072007-03-21
msg wrote:> Herbert Kleebauer wrote:> Do you have electronics recycling centers in your region? In > the U.S., these places accumulate vast quantities of serviceable > (usable) laptops which would be ideal platforms for the ongoing > hosting of the DOS software, and one can obtain quantities of > the machines for next to nothing.The problem is not the money, but the time of the students. The system must be very easy to use so the students can built the simple CPU at gate level in 10 hours including the time to learn the tools. And we don't want to use old hardware (we want to replace our old PC's). It would be ideal if the software would run on an actual OS (XP or maybe VISTA) so we wouldn't need any own hardware at all and could use the already existing computers in an electronic classroom (which also isn't in the first place a question of money but of available free rooms).> Also, it would be an interesting experiment to try running > the software on a VMWare MSDOS VM (a no-cost experiment); please > report the results!I hoped somebody already has done this and I could get some information.
Reply by ●March 21, 20072007-03-21
Symon wrote:> If it's OK, I have an observation. I wonder why these students are being > taught design methods on design tools and FPGA parts that most folks on this > newsgroup haven't used for a long time. The schematic vs. HDL wars have long > since died down because modern FPGA designs are generally 'better' > implemented using HDLs.This is an exercise to a lecture about computer organization. The student have just learned how to make a truth table, minimize logic functions and design simple state machines. In this exercise they should use this knowledge to implement a little bit more complex design. And what can be more interesting than designing your own CPU. Therefore VHDL isn't any alternative, they are only allowed to use D-FF's and simple gates like AND,OR,NAND,NOR. We could stop the course after simulating the design, but it is much more motivating when at the end your CPU is running in hardware. But this hardware has to be a simple hardware (not one of this complex multilayer FPGA prototyping boards) so they see that there is no hidden technology and they even could make the same board at home with an cheap soldering iron.> p.s. I HATE Viewlogic. I wasted a day on a legacy design a while back > because a wire had the wrong shaped dot on it. The worst part was the bloody > software guy spotted the mistake!Maybe you didn't use the DOS version. I suppose this software was made by hardware engineers to support there work. An it was so good that other people also wanted it. But with the success of the tool the company hired software engineers and these people can destroy any perfect usable SW in nearly no time. I installed the Windows version of WorkView when it was available, but after testing immediately deleted it. The same happened a few years before with the Daisy CAD system.
Reply by ●March 21, 20072007-03-21
cs_posting@hotmail.com wrote:> On Mar 20, 11:23 am, Herbert Kleebauer <k...@unibwm.de> wrote:> > The last > > version of XILINX ISE software which supports XC3000 FPGA's > > isn't an alternative (and I'm not sure whether it will > > run on W2k/XP) because the system must be extremely easy to > > use so the students are able to design and implement a simple > > CPU in about 10 hours (including the time to learn how to use > > the schematic entry and simulation tool). > > As a suggestion, drop the schematic entry approach and introduce a > hardware design language such as Verilog, or VHDL, or some academic > invention that can be translated - these are much more powerful and > extensible to real world applications. They are also much more > portable.As I explained in the other reply, that isn't an alternative.
