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interrupt handler on the Xilkernel PPC405

Started by zl April 25, 2007
hallo, people,

I am a beginner on Xilkernel running on PPC405-Virtex 4.

I just want to get interrupt generated from the OPB peripheral and the
have the interrupt handler routine serviced. It seems there is a bug I
can not find. The Xilkernel has no interaction with the interrupt
handler routine. I have taken the example project from Xilinx website,
which generates a periodic interrupts from a timer. The piece of codes
is as following:


#include "xmk.h"
#include <os_config.h>
#include <stdio.h>
#include <xparameters.h>
#include <xtmrctr_l.h>
#include <xstatus.h>
#include <pthread.h>
#include <semaphore.h>
#include <sys/intr.h>

#define TIMER_COUNTER_ID        0

volatile unsigned int mins, hrs, secs, tot_secs = 0;
unsigned int addr=XPAR_TIMER_2_BASEADDR;

int_id_t intTimerID = XPAR_INTC_TIMER_2_INTERRUPT_INTR;

void interval_timer_initialize ()
{
    print ("CLOCK: Configuring extra timer to generate one interrupt
per second..\r\n");
    XTmrCtr_mWriteReg (addr, TIMER_COUNTER_ID,
                       XTC_TLR_OFFSET, SYSTMR_CLK_FREQ);

    // reset the timers, and clear interrupts
    XTmrCtr_mSetControlStatusReg (addr, TIMER_COUNTER_ID,
				  XTC_CSR_INT_OCCURED_MASK | XTC_CSR_LOAD_MASK );

    // start the timer
    XTmrCtr_mSetControlStatusReg (addr, 0,
                                  XTC_CSR_ENABLE_TMR_MASK |
XTC_CSR_ENABLE_INT_MASK |
                                  XTC_CSR_AUTO_RELOAD_MASK |
XTC_CSR_DOWN_COUNT_MASK );
}

void extra_timer_int_handler ()
{
    unsigned int control_reg;

    control_reg = XTimerCtr_mReadReg (addr, TIMER_COUNTER_ID,
XTC_TCSR_OFFSET);

  XTmrCtr_mWriteReg (addr, TIMER_COUNTER_ID,
                       XTC_TCSR_OFFSET,
                       XTC_CSR_LOAD_MASK | XTC_CSR_INT_OCCURED_MASK);

    // remove the reset condition such that the timer counter starts
running
    // with the value loaded from the compare register
    XTmrCtr_mWriteReg (addr, TIMER_COUNTER_ID,
                       XTC_TCSR_OFFSET,
                       control_reg | XTC_CSR_ENABLE_TMR_MASK);
}


void* my_main (void *arg)
{
    int a = 0;
    XStatus status;

    if ((status = register_int_handler(intTimerID,
extra_timer_int_handler, NULL)) != XST_SUCCESS) {
	xil_printf ("CLOCK: Unable to register handler. Error code: %d.\r\n",
status);
	goto err;

    }
    else print ("CLOCK: Successfully registered a handler for extra
timer interrupts.\r\n");

    interval_timer_initialize ();

    print ("CLOCK: Enabling the interval timer interrupt...\r\n");

   enable_interrupt (intTimerID);

    while (1) {

    }

 err:
    xil_printf ("CLOCK: Clock functions unavailable...\r\n");
    return NULL;
}

int main(){
	xil_printf("main\r\n");
	xilkernel_main();
	return 0;
}

I think the magic functions with Xilkernal are just the
"register_int_handler" and "enable_interrupt". I have initialized the
timer properly and read the control status register while running. The
timer generates the interrupt bit correctly but THE INTERRUPT HANDLER
JUST KEEPS SILENCE. I have checked everything I can. With Standalone,
the board just runs perfectly.

Could anyone give me a hint or help? I am blocked here for the simple
project for several days and quasi-mad.

Thanks in advance

zl

have you set in .mss file in xilkernel section  PARAMETER
sysintc_spec=<interrupt device>?

On Apr 26, 11:53 am, Roman <plyas...@googlemail.com> wrote:
> have you set in .mss file in xilkernel section PARAMETER > sysintc_spec=<interrupt device>?
Thanks for help. Yes, for sure. I have checked all the possible tiny details. But I have figured out a little bit about the reason, perhaps not the direct trigger to the bug. The hardware design is changed from another project, which include UART16550. I want to use Xilkernel instead of Standalone. Therefore, i have to recomplie the hardware design. I just take away those licensed parts, change to Xilkernel and regenerate the Netlist in XPS 8.2. Somehow, when generating the new bitstream, it is informed that it should be done with project navigator. Then I just leave it so and go on with the software design. I guess that is the point. I will ask the hareware people to redesign the hardware and report the result here.
Je, I have fixed the problem.

The software program is 100% correct. No errors. The problem is with
the hardware design. When the new bitstream is generated after the
hardware design is changed, I update the bitstream with software
design, download, debug and then it runs.

But why earlier, I changed the hardware design without generating the
bitstream, XPS just pops no error? That makes me struggle with the
Xilkernel coding.

Thanks for reading!