I've read answer record 19146 about using a series resistor for 5V tolerance on Spartan 3 inputs. If the signal source is a 74LS TTL signal (e.g., 74LS14), what is the maximum Voh I can expect (over temperature, etc.)? It's not in the specs, but I know it's not 5V. Is it above 3.3V? I'll probably just assume 5V and use a 330 ohm resistor pack, but I'd like to know the real-world limit. Thanks, Eric
driving Spartan-3 input from 74LS TTL
Started by ●April 28, 2007
Reply by ●April 28, 20072007-04-28
Eric Smith wrote:> I've read answer record 19146 about using a series resistor for > 5V tolerance on Spartan 3 inputs. > > If the signal source is a 74LS TTL signal (e.g., 74LS14), what > is the maximum Voh I can expect (over temperature, etc.)? It's not > in the specs, but I know it's not 5V. Is it above 3.3V? > > I'll probably just assume 5V and use a 330 ohm resistor pack, but I'd > like to know the real-world limit.Can you guarantee it is always going to be a 74LS14 ? That's one important factor in skipping the limiter, and not always under your control. Also, what is the 5V/3.3V supply tolerances - if you know that then you should be able to do a LS load line calc, to see the clamp currents. - but the answer only applies to LS14 devices... If someone uses a HC/VHC/AHC/AC device, all that flies out the window :) -jg
Reply by ●April 28, 20072007-04-28
I remember well that all real TTL LS devices have an effective two- diode drop on the output. But you can easily measure that yourself. Then the question is whether 5 V minus 1.4 V is higher than your 3.3 V, and really higher than your 3.3 V plus a diode drop. You can easily try it out, and measure the current flowing into the FPGAinput when the LS output is High. Probably is it les than a few microamps. But then the question is about tolerances: can your 5V bw high while your 3.3 V is low, and what about the start-up condition? The resistor pck avoids all these headaches. Peter Alfke On Apr 28, 4:42 pm, Jim Granville <no.s...@designtools.maps.co.nz> wrote:> Eric Smith wrote: > > I've read answer record 19146 about using a series resistor for > > 5V tolerance on Spartan 3 inputs. > > > If the signal source is a 74LS TTL signal (e.g., 74LS14), what > > is the maximum Voh I can expect (over temperature, etc.)? It's not > > in the specs, but I know it's not 5V. Is it above 3.3V? > > > I'll probably just assume 5V and use a 330 ohm resistor pack, but I'd > > like to know the real-world limit. > > Can you guarantee it is always going to be a 74LS14 ? > That's one important factor in skipping the limiter, and > not always under your control. > > Also, what is the 5V/3.3V supply tolerances - if you know that > then you should be able to do a LS load line calc, to see > the clamp currents. > - but the answer only applies to LS14 devices... > If someone uses a HC/VHC/AHC/AC device, all that flies out > the window :) > > -jg
Reply by ●April 29, 20072007-04-29
Peter Alfke <alfke@sbcglobal.net> writes:> I remember well that all real TTL LS devices have an effective two- > diode drop on the output.That was the part I wasn't sure about.> Then the question is whether 5 V minus 1.4 V is higher than your 3.3 > V, and really higher than your 3.3 V plus a diode drop. > You can easily try it out, and measure the current flowing into the > FPGAinput when the LS output is High. Probably is it les than a few > microamps.> But then the question is about tolerances: can your 5V bw high while > your 3.3 V is low,Yes. That would have to be taken into account.> and what about the start-up condition?Oooh, I hadn't considered that.> The resistor pck avoids all these headaches.I wasn't trying to avoid the resistor, just trying to determine whether the value could be lower. I don't actually need it to be lower, but I wanted to understand the actual requirement. Even with 300 ohms, won't there be a problem if the 5V comes up first, or there is a fault and the Vcco isn't present? If the 5V is really 5.5V and Vcco is at/near 0V, the TTL output could be as much as 4.1V above Vcco. That would allow 11.7 nA, while answer record 19146 suggests that the current through the protection diode should not be more than 5.51 mA. To limit the current to 5.51 mA, the resistor would need to be 635.2 ohms (680 ohm 5%). That seems pretty high, but since TTL is slow stuff anyhow, it looks like it won't introduce enough delay to be a problem. Should answer record 19146 be revised to cover startup and Vcco fault conditions? Or is it safe to allow the I/O pin to power Vcco through the clamp diodes provided that it doesn't rise above Vcco(max)? Thanks, Eric
Reply by ●April 29, 20072007-04-29
I think 5 mA is an unnecessaily low limit. 10 mA is pefectly safe, even if it lasts forever. Don't forget, there is also a diode drop between the input and Vcco. The resistor value is a trade-off between speed (low resistor value) and "safety" (high value) Pick 300 to 1000 Ohm, any value will be ok. Consider the input a 10 pF load and put the resistor close to it.. Then 1kilohm means a 10 ns time constant... Peter Alfke On Apr 29, 3:09 pm, Eric Smith <e...@brouhaha.com> wrote:> Peter Alfke <a...@sbcglobal.net> writes: > > I remember well that all real TTL LS devices have an effective two- > > diode drop on the output. > > That was the part I wasn't sure about. > > > Then the question is whether 5 V minus 1.4 V is higher than your 3.3 > > V, and really higher than your 3.3 V plus a diode drop. > > You can easily try it out, and measure the current flowing into the > > FPGAinput when the LS output is High. Probably is it les than a few > > microamps. > > But then the question is about tolerances: can your 5V bw high while > > your 3.3 V is low, > > Yes. That would have to be taken into account. > > > and what about the start-up condition? > > Oooh, I hadn't considered that. > > > The resistor pck avoids all these headaches. > > I wasn't trying to avoid the resistor, just trying to determine whether > the value could be lower. I don't actually need it to be lower, but > I wanted to understand the actual requirement. > > Even with 300 ohms, won't there be a problem if the 5V comes up first, > or there is a fault and the Vcco isn't present? If the 5V is really > 5.5V and Vcco is at/near 0V, the TTL output could be as much as 4.1V > above Vcco. That would allow 11.7 nA, while answer record 19146 > suggests that the current through the protection diode should not be > more than 5.51 mA. To limit the current to 5.51 mA, the resistor > would need to be 635.2 ohms (680 ohm 5%). That seems pretty high, > but since TTL is slow stuff anyhow, it looks like it won't introduce > enough delay to be a problem. > > Should answer record 19146 be revised to cover startup and Vcco fault > conditions? Or is it safe to allow the I/O pin to power Vcco through > the clamp diodes provided that it doesn't rise above Vcco(max)? > > Thanks, > Eric
Reply by ●April 30, 20072007-04-30
Peter Alfke <alfke@sbcglobal.net> wrote:>I think 5 mA is an unnecessaily low limit. 10 mA is pefectly safe, >even if it lasts forever. >Don't forget, there is also a diode drop between the input and Vcco. >The resistor value is a trade-off between speed (low resistor value) >and "safety" (high value) >Pick 300 to 1000 Ohm, any value will be ok. Consider the input a 10 pF >load and put the resistor close to it.. Then 1kilohm means a 10 ns >time constant... >Peter AlfkeGiven the LS series is slow compared to modern logic, a resistor with a higher value may even be a better choice. Less emitted radiation and lower power consumption.>On Apr 29, 3:09 pm, Eric Smith <e...@brouhaha.com> wrote: >> Peter Alfke <a...@sbcglobal.net> writes: >> > I remember well that all real TTL LS devices have an effective two- >> > diode drop on the output. >> >> That was the part I wasn't sure about. >> >> > Then the question is whether 5 V minus 1.4 V is higher than your 3.3 >> > V, and really higher than your 3.3 V plus a diode drop. >> > You can easily try it out, and measure the current flowing into the >> > FPGAinput when the LS output is High. Probably is it les than a few >> > microamps. >> > But then the question is about tolerances: can your 5V bw high while >> > your 3.3 V is low, >> >> Yes. That would have to be taken into account. >> >> > and what about the start-up condition? >> >> Oooh, I hadn't considered that. >> >> > The resistor pck avoids all these headaches. >> >> I wasn't trying to avoid the resistor, just trying to determine whether >> the value could be lower. I don't actually need it to be lower, but >> I wanted to understand the actual requirement. >> >> Even with 300 ohms, won't there be a problem if the 5V comes up first, >> or there is a fault and the Vcco isn't present? If the 5V is really >> 5.5V and Vcco is at/near 0V, the TTL output could be as much as 4.1V >> above Vcco. That would allow 11.7 nA, while answer record 19146 >> suggests that the current through the protection diode should not be >> more than 5.51 mA. To limit the current to 5.51 mA, the resistor >> would need to be 635.2 ohms (680 ohm 5%). That seems pretty high, >> but since TTL is slow stuff anyhow, it looks like it won't introduce >> enough delay to be a problem. >> >> Should answer record 19146 be revised to cover startup and Vcco fault >> conditions? Or is it safe to allow the I/O pin to power Vcco through >> the clamp diodes provided that it doesn't rise above Vcco(max)? >> >> Thanks, >> Eric > >-- Reply to nico@nctdevpuntnl (punt=.) Bedrijven en winkels vindt U op www.adresboekje.nl
Reply by ●April 30, 20072007-04-30
Nico Coesel wrote:> Peter Alfke <alfke@sbcglobal.net> wrote: > > >>I think 5 mA is an unnecessaily low limit. 10 mA is pefectly safe, >>even if it lasts forever. >>Don't forget, there is also a diode drop between the input and Vcco. >>The resistor value is a trade-off between speed (low resistor value) >>and "safety" (high value) >>Pick 300 to 1000 Ohm, any value will be ok. Consider the input a 10 pF >>load and put the resistor close to it.. Then 1kilohm means a 10 ns >>time constant... >>Peter Alfke > > > Given the LS series is slow compared to modern logic, a resistor with > a higher value may even be a better choice. Less emitted radiation and > lower power consumption.Yes, but beware going too high, or the edges slew so slowly, that noise immunity suffers. You can use a parallel R/ small C for lowest power consumption, and little speed penalty. Same principle as Scope Probes. -jg
Reply by ●April 30, 20072007-04-30
Peter Alfke wrote:> I think 5 mA is an unnecessaily low limit. 10 mA is pefectly safe, > even if it lasts forever.OK. I suppose the official Xilinx documents (including answer records) have to be written conservatively.> Don't forget, there is also a diode drop between the input and Vcco.I was already taking that into account in my calculation. Thanks for the advice! Eric
Reply by ●May 12, 20072007-05-12
I asked about driving a 3.3V FPGA input (e.g., Spartan-3) from a 74LS14 TTL output. Peter Alfke wrote:> Pick 300 to 1000 Ohm, any value will be ok. Consider the input a 10 pF > load and put the resistor close to it.. Then 1kilohm means a 10 ns > time constant...I have found that I can get 74LVC244AD 3.3V octal buffers with 5V-tolerant inputs and 6 ns max prop. delay for less than the cost of 330 ohm 16-pin SMT resistor networks! part Digikey quantity 100 price NXP 74LVC244AD $0.26 Bourns 4816P-T01-331LF $0.71 CTS 767-163-R330P $0.37 (not stocked) Amazing. I guess those bleeding-edge fabs they use to make resistor networks must be really expensive! Maybe they could lower the cost by outsourcing production to TSMC :-) Eric
Reply by ●May 12, 20072007-05-12
Eric Smith wrote:> I asked about driving a 3.3V FPGA input (e.g., Spartan-3) from > a 74LS14 TTL output. > > Peter Alfke wrote: > >>Pick 300 to 1000 Ohm, any value will be ok. Consider the input a 10 pF >>load and put the resistor close to it.. Then 1kilohm means a 10 ns >>time constant... > > > I have found that I can get 74LVC244AD 3.3V octal buffers with 5V-tolerant > inputs and 6 ns max prop. delay for less than the cost of 330 ohm 16-pin > SMT resistor networks! > > part Digikey quantity 100 price > > NXP 74LVC244AD $0.26 > Bourns 4816P-T01-331LF $0.71 > CTS 767-163-R330P $0.37 (not stocked) > > Amazing. I guess those bleeding-edge fabs they use to make resistor > networks must be really expensive! Maybe they could lower the cost > by outsourcing production to TSMC :-)16 pin SMT networks are dinosaur part, so that's no real surprise. A better choice are the 1206 4 Element ones - much lower price and less PCB area - so no one uses the Bourns ones anymore. On a similar front, I noticed SiliconPOTs are getting better all the time, and one recent one had very good ppm matching and drift specs, and looking to be cheaper than alternate fixed-value precision resistors. -jg





