LVDS termination scheme to nonstandard ribbon cable

Hi

I am doing a Spartan3 to Spartan 3 interconnect trough a ribbon (flat)
cable with a characteristic impedance of 173R balanced (103R
unbalanced).
I have tried xilinx webcase to answer on the termination requirements
of LVDS for spartan 3 withhout much luck. I got 2 different answers.

My questions are:

1) Can I use a ribbon cable with 173R balanced characteristic
impedance? I have read that it should be 100R. The transmission is
rather short, 300mm and relative slow in lvds terms. I would rather
not switch the cable since it have other good properities that I rely
on.

2) With the above cable should the receiver end termination still be
100R

3) With the above cable is a source resistor network necessary to
match the impedance on the transmitter side and lower reflections?
This is the point where xilinx tend to confuse itself in its
datasheets for spartan 3. My dirty solution with adding 150R series
resisor tend to give nicer signals.

Hope someone could help me on this.

Thanks in advance

<stefan.elmsted@gmail.com> wrote in message 
news:1179994496.131118.159040@o5g2000hsb.googlegroups.com...
> Hi
>
> I am doing a Spartan3 to Spartan 3 interconnect trough a ribbon (flat)
> cable with a characteristic impedance of 173R balanced (103R
> unbalanced).
> I have tried xilinx webcase to answer on the termination requirements
> of LVDS for spartan 3 withhout much luck. I got 2 different answers.
>
> My questions are:
>
> 1) Can I use a ribbon cable with 173R balanced characteristic
> impedance? I have read that it should be 100R. The transmission is
> rather short, 300mm and relative slow in lvds terms. I would rather
> not switch the cable since it have other good properities that I rely
> on.
>
Yes.
>
> 2) With the above cable should the receiver end termination still be
> 100R
>
No. It should match the cable.
>
> 3) With the above cable is a source resistor network necessary to
> match the impedance on the transmitter side and lower reflections?
> This is the point where xilinx tend to confuse itself in its
> datasheets for spartan 3. My dirty solution with adding 150R series
> resisor tend to give nicer signals.
>
No, it's not necessary. If the receiver is properly terminated, there should 
be no reflections.

BTW, the impedance of the cable seems high. What cable are you using, and in 
what mode? I.e.

GSGSGS  or GSSGSSG   or has the cable got twisted pairs?

G = ground, S = signal.

Cheers, Syms. 

stefan.elmsted@gmail.com wrote:
> Hi
> 
> I am doing a Spartan3 to Spartan 3 interconnect trough a ribbon (flat)
> cable with a characteristic impedance of 173R balanced (103R
> unbalanced).
> I have tried xilinx webcase to answer on the termination requirements
> of LVDS for spartan 3 withhout much luck. I got 2 different answers.
> 
> My questions are:
> 
> 1) Can I use a ribbon cable with 173R balanced characteristic
> impedance? I have read that it should be 100R. The transmission is
> rather short, 300mm and relative slow in lvds terms. I would rather
> not switch the cable since it have other good properities that I rely
> on.
> 
> 2) With the above cable should the receiver end termination still be
> 100R
> 
> 3) With the above cable is a source resistor network necessary to
> match the impedance on the transmitter side and lower reflections?
> This is the point where xilinx tend to confuse itself in its
> datasheets for spartan 3. My dirty solution with adding 150R series
> resisor tend to give nicer signals.
> 
> Hope someone could help me on this.
> 
> Thanks in advance

The receiver should be the differential impedance of the cable and of 
the transmitter - they should all (roughly) match.  If you have an 
external termination at the receiver, change it to the 173 ohm value if 
that's the true differential impedance.  If the termination is internal 
at 100 ohms, add two 36 ohm resistors (or thereabouts) to get the 
impedance match, albeit at a reduced signal amplitude.

On the transmitter, you want a 100 ohm to 173 ohm impedance match so the 
transmitter sees 100 ohm but the transmission line sees 173 ohm.  You'll 
need a differential termination on the transmitter side of this network 
and two series resistors to the ribbon cable.  The signal amplitude will 
again be reduced.

If the doubly-reduced signal amplitude is a problem, your slower speed 
will allow a different approach.  Rather than using the native 100 ohm 
LVDS transmitter, step back a couple years and use a three-resistor 
network to match 2.5V differential outputs to the LVDS levels and 
impedances you need.  If you analyze the resistor networks used by the 
Bus-LVDS Xilinx I/O level or some of the older "LVDS" drivers in the 
various families, you'll find simple 3-resistor networks that make the 
rail-to-rail drivers look like a transmitter with 100 ohm differential 
impedance with the right voltage swing.  You can alter the network to 
give you 173 ohms with a voltage swing appropriate to your receiver 
termination.

173 ohms all the way through make the signal clean at the receiver.

All,

I suppose suggesting that the question could be answered in less than 10 
minutes using a SIGNAL INTEGRITY simulator would just be silly?

I am absolutely amazed at how much time, money, and energy is wasted 
just because a SI simulator is "expensive."

One respin of a pcb is MORE $$$ than buying the SI simulator tool.

Mentor's Hyperlynx(tm) simulator is my favorite, but Cadence has their 
tool which might be more to some folks liking (it is integrated with the 
PCB layout stuff).

So, how about it?  Invest in something that will save you enough money 
to pay for it the first time you do not screw up.

Submit a hotline webcase, and ask for a "what if" SI simulation.  That 
way you will get a free example of (one) solution to your problem.


One comment: matching the transmitter impedance is a good idea, as a 
perfect match at the receiver is impossible (perfect may happen in 
textbooks, but not in real life).

Austin

"John_H" <newsgroup@johnhandwork.com> wrote in message 
news:cUg5i.9206$ix.312@trndny01...
> stefan.elmsted@gmail.com wrote:
>> Hi
>
> On the transmitter, you want a 100 ohm to 173 ohm impedance match so the 
> transmitter sees 100 ohm but the transmission line sees 173 ohm.  You'll 
> need a differential termination on the transmitter side of this network 
> and two series resistors to the ribbon cable.  The signal amplitude will 
> again be reduced.
>
You don't _need_ to match both transmitter and receiver. One or the other is 
good enough, provided the path between the driver and the cable has the same 
impedance as the cable, or this path is short. Cf. ECL logic, low output 
impedance, but can drive a properly terminated diff. pair. LVDS outputs are 
matched to the line to get a belt 'n' braces approach to reduce reflections, 
but it's not necessary to match the transmitter to the line.

Here's an app note which describes the output structures.
http://www.maxim-ic.com/appnotes.cfm/an_pk/291

HTH, Syms. 

Symon,

Xilinx must recommend the standard, tried and true, solution, we are not 
allowed to cut corners, as that leads to unhappy customers and lowers 
our sales figures while customers are trying to fix something they 
should have gotten right the first time.

LVDS is a standard.  The transmitter is 100 ohms, the line is 100 ohms, 
the receiver is 100 ohms.  They didn't do it this way because they were 
stupid:  they did it this way for the reason I stated.

If you want to do SLVDS (Symon's Low Voltage Differential Signalling) be 
my guest.

Will SLVDS work?  Most of the time, probably.  The advantage of a 
standard is "set it and forget it" as there will be no problems unless 
you have done something wrong (like ignore the transmit match).  Should 
simulate it, though.

Another example of this is where customers discover that simple LVCMOS 
works faster, and with less power to DDR SDRAM chips located close to 
the FPGA.  Do we recommend it? No.  Do people make a robust interface, 
that works just fine in production?  Yes.  But they have to do more 
work, to make sure they will be safe across all corners (silicon, 
voltage, temperature).

Austin

"austin" <austin@xilinx.com> wrote in message 
news:f34740$6dj2@cnn.xilinx.com...
>
> One comment: matching the transmitter impedance is a good idea, as a 
> perfect match at the receiver is impossible (perfect may happen in 
> textbooks, but not in real life).
>
> Austin
>
It is possible to match even Xilinx's hideous 10pF receiver pins. Here's an 
example from Xilinx's own consultant's website:-
http://sigcon.com/Pubs/edn/ConstantRTermination.htm

HTH, Syms. 

"austin" <austin@xilinx.com> wrote in message 
news:f348ds$6dj3@cnn.xilinx.com...
> Symon,
>
> Xilinx must recommend the standard, tried and true, solution, we are not 
> allowed to cut corners, as that leads to unhappy customers and lowers our 
> sales figures while customers are trying to fix something they should have 
> gotten right the first time.
>
> LVDS is a standard.  The transmitter is 100 ohms, the line is 100 ohms, 
> the receiver is 100 ohms.  They didn't do it this way because they were 
> stupid:  they did it this way for the reason I stated.
>
> If you want to do SLVDS (Symon's Low Voltage Differential Signalling) be 
> my guest.
>
> Will SLVDS work?  Most of the time, probably.  The advantage of a standard 
> is "set it and forget it" as there will be no problems unless you have 
> done something wrong (like ignore the transmit match).  Should simulate 
> it, though.
>
> Austin
>
Did you read the OP's requirement? He's not driving a 100R transmission 
line, he's driving something with a different charactaristic impedance, 
173R. So, the LVDS 'standard' won't work. Terminating the output will reduce 
his output swing. Are you sure in this application matching the output 
impedance is more important than a large signal swing?
Cheers, Syms.
p.s. Simulation is a good plan, I wonder where can you get a decent model 
for ribbon cable? 

Symon,

Yes, I know what the author of the post is trying to do.

Yes, Hyperlynx has built in models for a number of ribbon cables.

Without running the simulator, it is a complete waste of time to suggest 
anything as a "solution" to this question.

Now that I have spent three times longer than I would have solving it 
with the simulator, it appears that we have paid for the simulator, once 
again.

GET IT? (I know you do, Symon).

Austin

"Symon" <symon_brewer@hotmail.com> wrote in message 
news:f349ou$ppq$1@aioe.org...
> "austin" <austin@xilinx.com> wrote in message 
> news:f34740$6dj2@cnn.xilinx.com...
>>
>> One comment: matching the transmitter impedance is a good idea, as a 
>> perfect match at the receiver is impossible (perfect may happen in 
>> textbooks, but not in real life).
>>
>> Austin
>>
> It is possible to match even Xilinx's hideous 10pF receiver pins. Here's 
> an example from Xilinx's own consultant's website:-
> http://sigcon.com/Pubs/edn/ConstantRTermination.htm
>
> HTH, Syms.
>
Here's some more links:-

http://sigcon.com/Pubs/edn/TerminatorOne.htm
http://sigcon.com/Pubs/edn/TerminatorTwo.htm
http://sigcon.com/Pubs/edn/TerminatorThree.htm

HTH, Syms.