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Re: Spirit on Mars

Started by Pablo Bleyer January 22, 2004
"Austin Lesea" <austin@xilinx.com> escribi&#4294967295; en el mensaje
news:bup6dl$8dl2@cliff.xsj.xilinx.com...
> The reason for the failure of other parts could be that they are NOT > FPGAs. FPGAs are manufactured in huge volumes, and are all tested in > the qualification for latch up under irradiation. Many SRAM,s and other > products do not have the volume to afford such testing, and in fact > recent shrinks of common parts are known to latch up with a single > event, and destroy themselves.
Interesting. Under what conditions and what kind of tests are Xilinx rad-hard FPGAs tested for irradiation? Datasheets usually have too condensed information about rad parameters... Regards.
Lest anyone spread rumors,

Spirit used a 4K QPRO part for the squibs that fired for the parachute, 
the inflatable bag, etc for the Lander.

The rover has Virtex 1000's in the wheels for position/motor control.

The fact that the Spirit has stopped sending useful data back to NASA is 
a terrible thing, but we got them there, and rolled them onto the 
surface.  Other folks parts are supposed to do the communicating with 
Earth.  Who volunteers to let us know whose components are used for 
that?  What processor did they use?

Hope those folks figure it out, as it is a tradegy for everyone to lose 
the ability to gain knowledge of our solar system.

By the way, the self checks on the FPGAs after that solar flare that 
destroyed that Japanese satellite's electronics showed that the FPGAs 
were undamaged, and had suffered not at all from the flare (as we can 
take many rads of radiation, and not be affected at all).

The reason for the failure of other parts could be that they are NOT 
FPGAs.  FPGAs are manufactured in huge volumes, and are all tested in 
the qualification for latch up under irradiation.  Many SRAM,s and other 
products do not have the volume to afford such testing, and in fact 
recent shrinks of common parts are known to latch up with a single 
event, and destroy themselves.

Austin

You're saying that FPGAs enjoy higher volumes than SRAMs?  Interesting...


Austin Lesea <austin@xilinx.com> wrote in message news:<bup6dl$8dl2@cliff.xsj.xilinx.com>...
> The reason for the failure of other parts could be that they are NOT > FPGAs. FPGAs are manufactured in huge volumes, and are all tested in > the qualification for latch up under irradiation. Many SRAM,s and other > products do not have the volume to afford such testing, and in fact > recent shrinks of common parts are known to latch up with a single > event, and destroy themselves. > > Austin
Austin Lesea <austin@xilinx.com> wrote:
: Lest anyone spread rumors,

: Spirit used a 4K QPRO part for the squibs that fired for the parachute, 
: the inflatable bag, etc for the Lander.

The Moessbauer Spectrometer has a Quicklogic QL30XX...

If I remember right, the APX has an Altera ...

Bye
-- 
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Jake,

No, you are correct about SRAMs, I am wrong there.  My only point is 
that SRAMs can not all be tested at LANSCE in the beam, and when they do 
get around to it, there have been some spectacular single event latch up 
problems (ie instant destruction of the device).

Austin

Jake Janovetz wrote:
> You're saying that FPGAs enjoy higher volumes than SRAMs? Interesting... > > > Austin Lesea <austin@xilinx.com> wrote in message news:<bup6dl$8dl2@cliff.xsj.xilinx.com>... > >>The reason for the failure of other parts could be that they are NOT >>FPGAs. FPGAs are manufactured in huge volumes, and are all tested in >>the qualification for latch up under irradiation. Many SRAM,s and other >>products do not have the volume to afford such testing, and in fact >>recent shrinks of common parts are known to latch up with a single >>event, and destroy themselves. >> >>Austin
Uwe,

Thank you.  Very interesting.  This is the kind of info that is useful 
to know.

Austin

Uwe Bonnes wrote:

> Austin Lesea <austin@xilinx.com> wrote: > : Lest anyone spread rumors, > > : Spirit used a 4K QPRO part for the squibs that fired for the parachute, > : the inflatable bag, etc for the Lander. > > The Moessbauer Spectrometer has a Quicklogic QL30XX... > > If I remember right, the APX has an Altera ... > > Bye
In article <bup6dl$8dl2@cliff.xsj.xilinx.com>,
Austin Lesea  <austin@xilinx.com> wrote:
>The reason for the failure of other parts could be that they are NOT >FPGAs. FPGAs are manufactured in huge volumes, and are all tested in >the qualification for latch up under irradiation. Many SRAM,s and other >products do not have the volume to afford such testing, and in fact >recent shrinks of common parts are known to latch up with a single >event, and destroy themselves.
I seriously doubt the paranoid EEs at JPL would allow any device which couldn't stand the radiation load, and wasn't batch-tested for the radiation load, onto the rover. My personal bet would be software fault or a nontransient hardware fault in non-memory. -- Nicholas C. Weaver nweaver@cs.berkeley.edu
Pablo,

Thanks for the opportunity to let us brag a bit:

Test

We test all technologies as part of the qualification in the proton beam 
at UC Davis, and then at LANSCE in the neutron beam (the industry only 
gets a few days a year to do tests at LANSCE which is the only facility 
in the world with a HESS spectrum neutron beam).

Hot, Hot, Hot!

Can not take them home after the tests till they "cool off" as they are 
radioactive after spending so much time in the beam.  Oh, and none of 
them ever suffer any damage -- they power on and meet all specs after 
hundred and hundreds of rads.

Real Tests

We also do atmospheric testing.  We call this the "Rosetta" experiments, 
as they are intended to help us decipher the meaning of the LANSCE tests 
which are, after all, just an arbitrary test that has only a correlation 
to real performance.

Sea Level, 5100 Feet, 12,500 Feet, 13,200 Feet

We have 100 2VP50's here in San Jose, 100 2V6000's here in San Jose, 100 
2V6000's in Albuquerque NM, 100 2V6000's on White Mountain, California 
(outside of Bishop, Ca), 100 3s1500's due to go online soon here in San 
Jose, and 100 2VP30's also here in San Jose.  Another 110 2V6000's go to 
Mauna Kea Hawaii next week to the Caltech Submillimeter Observatory.

All of them our monitored every 2 hours for any single cosmic ray 
induced upset.

Analysis

This is a standard procedure, and we are the ONLY company that actually 
KNOWS how our parts are affected by cosmic neutron showers, alpha 
particles, etc in REAL applications from sea level to 60,000 feet (I 
can't talk about the programs we have for mil/aerospace until you sign 
an NDA).

Competitors

Other companies out there are in a state of "blissful ignorance" and 
when (not if) they start to have customers complain of failures, they 
will be saying, "gee, we don't see anything (because we can't), must be 
something you are doing."  Why can't they see anything when a customer 
complains?

Xilinx Advanced Technology

Our advanced readback and internal access configuration port allows us 
to actually check all memory cell states to see if anything anywhere has 
flipped.  We can then locate the exact cell that flipped (ie LUT, BRAM, 
config latch, etc. and from than know what the susceptibility of each 
one really is).  We can identify if that bit is used in the customer's 
design, and what it does.  Because we have had to do this for the 
military/aerospace community for years, we are able to do this for 
everyone else who may suspect that they have soft errors.

Reality

Customers are unlikely to see the problem as anything but a background 
annoying return rate of "no problems found" as powering down and up, or 
reconfiguring makes the "problem" go away!

At least we have been working on this for 5+ years, have patents 
pending, making improvements, and understanding exactly how things 
happen (upsets do happen....most people are totally unaware of this fact).

How We Assure Reliability

In addition to design techniques in silicon, we also have application 
design techniques to reduce the probability of soft error causing 
failure to 0 (ie Spirit and Opportunity, not to mention the hundreds of 
military and aerospace applications we "fly" in).

We are presenting papers at conferences (MAPLD 2003, for example) 
detailing our results for .5u, .35u, .22u. .18u, .15u, .13u and 90 
nanometer.  If interested, email me directly, and I will send you the 
MAPLD ppt presentation.

Call or Write for More Information

Or better yet, contact your Xilinx FAE for a full technical presentation!

Austin

PS:  many have asked me if the information I present here is unique 
(proprietary) in any way.  It is not.  All information posted is 
published already (ie in the public domain).  It is just that I do see 
all Xilinx press releases, and see all marketing communications, so I am 
aware of what we can (and are able to) post.


Pablo Bleyer wrote:

> "Austin Lesea" <austin@xilinx.com> escribi&#4294967295; en el mensaje > news:bup6dl$8dl2@cliff.xsj.xilinx.com... > >>The reason for the failure of other parts could be that they are NOT >>FPGAs. FPGAs are manufactured in huge volumes, and are all tested in >>the qualification for latch up under irradiation. Many SRAM,s and other >>products do not have the volume to afford such testing, and in fact >>recent shrinks of common parts are known to latch up with a single >>event, and destroy themselves. > > > Interesting. Under what conditions and what kind of tests are Xilinx > rad-hard FPGAs tested for irradiation? Datasheets usually have too condensed > information about rad parameters... > > Regards. > > > >
On a sunny day (Thu, 22 Jan 2004 10:56:52 -0800) it happened Austin Lesea
<austin@xilinx.com> wrote in <bup6dl$8dl2@cliff.xsj.xilinx.com>:
> >Hope those folks figure it out, as it is a tradegy for everyone to lose >the ability to gain knowledge of our solar system.
It is obvious whodidit: http://www.home.zonnet.nl/panteltje/mars/easthills-bunny.jpg
Austin Lesea wrote:
> Pablo, > > Thanks for the opportunity to let us brag a bit:
<snip interesting info>
> Xilinx Advanced Technology > > Our advanced readback and internal access configuration port allows us > to actually check all memory cell states to see if anything anywhere has > flipped. We can then locate the exact cell that flipped (ie LUT, BRAM, > config latch, etc. and from than know what the susceptibility of each > one really is). We can identify if that bit is used in the customer's > design, and what it does. Because we have had to do this for the > military/aerospace community for years, we are able to do this for > everyone else who may suspect that they have soft errors.
How much of this is non-invasive - ie can be done with the device operating, and how much needs it to be halted/paused ? -jg