On Jun 8, 2:42 am, "Ben Jones" <ben.jo...@xilinx.com> wrote:> Maybe you can share some details of why exactly you need such a macro?The application requires one processed data point per clock, pipelined ... some 17 multiplies and 6 squarings, per point. Not even close to enough multiplier blocks in the XC3S2000 FPGA (just 40), but nearly enough LUTs (just under 41K). The LUT squarers are simpler, as many terms fall out. The application's data has some specific relationships, which also allow some optimizations of the multipliers, with an estimated savings in area of about 20%. Plus a few multiplies are with scaled integers, allowing a few LSB's to be ommitted in the results.
What's the smallest/fastest CLB/Slice/Lut based unsigned integer 64 bit by 64 bit multiplier/squarer design?
Started by ●June 2, 2007
Reply by ●June 8, 20072007-06-08





