I cannot find any reference to powerPC cores in any of the Virtex-5 datasheets. The only reference to PowerPC in those documents is that PowerPC is a trademark of IBM. Does anyone know if Xilinx stopped including PowerPC cores in virtex-5 and why? Thanks
Virtex-5 and powerpc
Started by ●July 25, 2007
Reply by ●July 25, 20072007-07-25
On 25 Jul., 15:14, janb...@gmail.com wrote:> I cannot find any reference to powerPC cores in any of the Virtex-5 > datasheets. The only reference to PowerPC in those documents is that > PowerPC is a trademark of IBM. > > Does anyone know if Xilinx stopped including PowerPC cores in virtex-5 > and why? > > ThanksV5-FX will include PPC440 from AMC (IBM did sell PPC4xx to AMC) but the FX introduction is delaying (about 1 year)... you just have to wait. Antti
Reply by ●July 25, 20072007-07-25
All, The V5 FX family is open for early access, and yes, it has a PowerPC(tm) processor. I am sure that you have also read Antti's post, so he has already "spilled the beans" about which version it is. Xilinx decided to see which IP provider had the best 'deal' for the core, so it is licensed from a third party (who licenses from IBM). The advantage to Xilinx is that at 65nm we have the RTL code (the 405 was full custom from IBM in both 130 and 90nm). Having the RTL allows us to do much more than we have done in the past. It allows our PowerPC team to craft a much better solution for our customers. The silicon for the FX is back, and in house, so we are very very busy with Verification and Characterization (V&C). Contact your FAE, disti, or rep, for details. Right now we have many units in ovens at 100C (and freezers at -40C) running Quake, Linux, etc. to shake out all the bugs. Some of the nice new features are: integrated APU, 5-way crosspoint buss switch with scatter-gather DMA controllers, 64K data and instruction caches with parity (for soft error flush, and re-fetch)... Austin
Reply by ●July 25, 20072007-07-25
On 25 Jul., 17:10, austin <aus...@xilinx.com> wrote:> All, > > The V5 FX family is open for early access, and yes, it has a PowerPC(tm) > processor. > > I am sure that you have also read Antti's post, so he has already > "spilled the beans" about which version it is. > > Xilinx decided to see which IP provider had the best 'deal' for the > core, so it is licensed from a third party (who licenses from IBM). > > The advantage to Xilinx is that at 65nm we have the RTL code (the 405 > was full custom from IBM in both 130 and 90nm). Having the RTL allows > us to do much more than we have done in the past. It allows our PowerPC > team to craft a much better solution for our customers. > > The silicon for the FX is back, and in house, so we are very very busy > with Verification and Characterization (V&C). Contact your FAE, disti, > or rep, for details. Right now we have many units in ovens at 100C (and > freezers at -40C) running Quake, Linux, etc. to shake out all the bugs. > > Some of the nice new features are: integrated APU, 5-way crosspoint buss > switch with scatter-gather DMA controllers, 64K data and instruction > caches with parity (for soft error flush, and re-fetch)... > > AustinAustin the "440" was spilled by an Xilinx employee in August 2006... ;) Antti
Reply by ●July 25, 20072007-07-25
Antti, Very hard for me to keep track of "leaks"... Austin Antti wrote:> On 25 Jul., 17:10, austin <aus...@xilinx.com> wrote: >> All, >> >> The V5 FX family is open for early access, and yes, it has a PowerPC(tm) >> processor. >> >> I am sure that you have also read Antti's post, so he has already >> "spilled the beans" about which version it is. >> >> Xilinx decided to see which IP provider had the best 'deal' for the >> core, so it is licensed from a third party (who licenses from IBM). >> >> The advantage to Xilinx is that at 65nm we have the RTL code (the 405 >> was full custom from IBM in both 130 and 90nm). Having the RTL allows >> us to do much more than we have done in the past. It allows our PowerPC >> team to craft a much better solution for our customers. >> >> The silicon for the FX is back, and in house, so we are very very busy >> with Verification and Characterization (V&C). Contact your FAE, disti, >> or rep, for details. Right now we have many units in ovens at 100C (and >> freezers at -40C) running Quake, Linux, etc. to shake out all the bugs. >> >> Some of the nice new features are: integrated APU, 5-way crosspoint buss >> switch with scatter-gather DMA controllers, 64K data and instruction >> caches with parity (for soft error flush, and re-fetch)... >> >> Austin > > Austin the "440" was spilled by an Xilinx employee in August > 2006... ;) > > Antti > > > > >
Reply by ●July 25, 20072007-07-25
On 25 Jul., 19:51, austin <aus...@xilinx.com> wrote:> Antti, > > Very hard for me to keep track of "leaks"... > > Austin > > > > Antti wrote: > > On 25 Jul., 17:10, austin <aus...@xilinx.com> wrote: > >> All, > > >> The V5 FX family is open for early access, and yes, it has a PowerPC(tm) > >> processor. > > >> I am sure that you have also read Antti's post, so he has already > >> "spilled the beans" about which version it is. > > >> Xilinx decided to see which IP provider had the best 'deal' for the > >> core, so it is licensed from a third party (who licenses from IBM). > > >> The advantage to Xilinx is that at 65nm we have the RTL code (the 405 > >> was full custom from IBM in both 130 and 90nm). Having the RTL allows > >> us to do much more than we have done in the past. It allows our PowerPC > >> team to craft a much better solution for our customers. > > >> The silicon for the FX is back, and in house, so we are very very busy > >> with Verification and Characterization (V&C). Contact your FAE, disti, > >> or rep, for details. Right now we have many units in ovens at 100C (and > >> freezers at -40C) running Quake, Linux, etc. to shake out all the bugs. > > >> Some of the nice new features are: integrated APU, 5-way crosspoint buss > >> switch with scatter-gather DMA controllers, 64K data and instruction > >> caches with parity (for soft error flush, and re-fetch)... > > >> Austin > > > Austin the "440" was spilled by an Xilinx employee in August > > 2006... ;) > > > Antti- Zitierten Text ausblenden - > > - Zitierten Text anzeigen -;) eh I just did not want the credits... a
Reply by ●July 25, 20072007-07-25
austin wrote:> The silicon for the FX is back, and in house, so we are very very busy > with Verification and Characterization (V&C). Contact your FAE, disti, > or rep, for details. Right now we have many units in ovens at 100C (and > freezers at -40C) running Quake, Linux, etc. to shake out all the bugs.Will there be a Quake reference design available for download? :) SCNR, Sean -- My email address is only valid until the end of the month. Try figuring out what the address is going to be after that...
