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Differences between Xilinx ISE and Altera Quartus software

Started by Jean Nicolle February 1, 2004
Hi all,

I tried to summarize the differences in a table.
http://www.fpga4fun.com/table.html

Sorry about the link, it wasn't easy to duplicate the table in text form for
this posting.

Things I'd be interesting to hear about:
1. is the info accurate?
2. did I miss important features that differentiate the 2 software? (without
getting into details, these are big software...)

The table is intended as a beginner's guide to FPGA's software.
Thanks for any help/comments.
Jean


Jean Nicolle wrote:
> Hi all, > > I tried to summarize the differences in a table. > http://www.fpga4fun.com/table.html > > Sorry about the link, it wasn't easy to duplicate the table in text form for > this posting. > > Things I'd be interesting to hear about: > 1. is the info accurate? > 2. did I miss important features that differentiate the 2 software? (without > getting into details, these are big software...) > > The table is intended as a beginner's guide to FPGA's software. > Thanks for any help/comments. > Jean
Looks a good idea. You could clarify that this is comparing FREE versions, with maybe the cost of the first step upward from that ?. Perhaps a Device Ceiling (Part num and appx resource ) ? " Free up to XXXX " Installed size (100's of MB ?), and machine minimums in MB RAM and GHz clocks.... If you can be bothered, Links to a small code snippet for VHDL, verilog, ABEL, AHDL could clarify that for beginners - something like a 4 bit U/D/LD counter ? -jg
Jean Nicolle <j.nicolle@sbcglobal.net> wrote:
: Hi all,

: I tried to summarize the differences in a table.
: http://www.fpga4fun.com/table.html

: Sorry about the link, it wasn't easy to duplicate the table in text form for
: this posting.

: Things I'd be interesting to hear about:
: 1. is the info accurate?
: 2. did I miss important features that differentiate the 2 software? (without
: getting into details, these are big software...)

: The table is intended as a beginner's guide to FPGA's software.
: Thanks for any help/comments.

You can use Iverilog for Xilinx too. And Cver also for both. Cver alos knows
about SDF and can be use for post layout simulation.

Bye

-- 
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
"Jim Granville" <no.spam@designtools.co.nz> wrote in message
news:SXeTb.20077$ws.2691958@news02.tsnz.net...
> > Jean Nicolle wrote: > > Hi all, > > > > I tried to summarize the differences in a table. > > http://www.fpga4fun.com/table.html > > > > Sorry about the link, it wasn't easy to duplicate the table in text form
for
> > this posting. > > > > Things I'd be interesting to hear about: > > 1. is the info accurate? > > 2. did I miss important features that differentiate the 2 software?
(without
> > getting into details, these are big software...) > > > > The table is intended as a beginner's guide to FPGA's software. > > Thanks for any help/comments. > > Jean > > Looks a good idea. > > You could clarify that this is comparing FREE versions, with maybe > the cost of the first step upward from that ?. > > Perhaps a Device Ceiling (Part num and appx resource ) ? > " Free up to XXXX " > > Installed size (100's of MB ?), and machine minimums in MB RAM and GHz > clocks....
I assume this is all for the Windows PC only. If so, what version(s) of the OS are supported - I believe Altera still supports Windows 98 and ME while Xilinx requires NT or XP. If not PC only, does it run on Linix? Not everybody, especially those doing things "for fun", have the latest OS versions. I ended up with Quartus because I'm still running 98SE.
> If you can be bothered, Links to a small code snippet for VHDL, verilog, > ABEL, AHDL could clarify that for beginners - something like a 4 bit > U/D/LD counter ? > > -jg > > >
> You could clarify that this is comparing FREE versions, with maybe > the cost of the first step upward from that ?.
Actually the table is intended for both.
> Perhaps a Device Ceiling (Part num and appx resource ) ? > " Free up to XXXX "
Looks like the limit is 200KGates for Altera and 400KGates for Xilinx.
> Installed size (100's of MB ?), and machine minimums in MB RAM and GHz > clocks....
I'll look to see if there are big differences in the requirements. I could also include the OS'es supported
> If you can be bothered, Links to a small code snippet for VHDL, verilog, > ABEL, AHDL could clarify that for beginners - something like a 4 bit > U/D/LD counter ?
Sounds like a good idea.
> You can use Iverilog for Xilinx too. And Cver also for both. Cver alos
knows
> about SDF and can be use for post layout simulation.
Sounds interesting. Here, right? http://www.pragmatic-c.com/commercial-cver/cver.htm It doesn't seem available for free anymore though, even for non-commercial use.
Do anyone knows the price of ISE/Quartus?
Do they come with the same scheme (1 year licencing)?
Once the license expires, does the software stops working, or there is just
no more updates?

Thanks.


Jean Nicolle <j.nicolle@sbcglobal.net> wrote:
: > You can use Iverilog for Xilinx too. And Cver also for both. Cver alos
: knows
: > about SDF and can be use for post layout simulation.

: Sounds interesting.
: Here, right?
: http://www.pragmatic-c.com/commercial-cver/cver.htm

: It doesn't seem available for free anymore though, even for non-commercial
: use.

There's a GPL-Cver version

-- 
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Jean Nicolle wrote:
> Hi all, > > I tried to summarize the differences in a table. > http://www.fpga4fun.com/table.html > > Sorry about the link, it wasn't easy to duplicate the table in text form for > this posting. > > Things I'd be interesting to hear about: > 1. is the info accurate? > 2. did I miss important features that differentiate the 2 software? (without > getting into details, these are big software...) > > The table is intended as a beginner's guide to FPGA's software. > Thanks for any help/comments.
Thanks, that is great. A minor note : AHDL is standing for Altera Highlevel language. AFAIK, the free version only supports Megawizard function to be output in AHDL. Some pricetags would help too. The license restrictions would also be of interest. AFAIK, the Quartus2 free license is 90 or 180 days. Rene -- Ing.Buero R.Tschaggelar - http://www.ibrtses.com & commercial newsgroups - http://www.talkto.net
Rene Tschaggelar <none@none.net> wrote in message news:<a1a691870ee18d1408d46636e8d0500a@news.teranews.com>...
> Jean Nicolle wrote: > > Hi all, > > > > I tried to summarize the differences in a table. > > http://www.fpga4fun.com/table.html > > > > Sorry about the link, it wasn't easy to duplicate the table in text form for > > this posting. > > > > Things I'd be interesting to hear about: > > 1. is the info accurate? > > 2. did I miss important features that differentiate the 2 software? (without > > getting into details, these are big software...) > > > > The table is intended as a beginner's guide to FPGA's software. > > Thanks for any help/comments. > > Thanks, that is great. > A minor note : AHDL is standing for Altera Highlevel language. > AFAIK, the free version only supports Megawizard function to > be output in AHDL. > > Some pricetags would help too. The license restrictions would > also be of interest. > AFAIK, the Quartus2 free license is 90 or 180 days. > > Rene
Hi, This is a correction to Rene's posting. The Quartus II 3.0 Web Edition license duration is for 180 days, and can be renewed as many times as needed from the web, i.e. there is no need to upgrade to a full subscription at the end of the 180 days. The Megawizard Plug IN Manager in the Quartus II 3.0 Web Edition provides output in VHDL, Verilog and AHDL. - Subroto Datta Altera Corp.