hey, in FPGA-Editor i can choose a slice and type in an equation for this block. i need information, where i can find this equation (truth table) in the generated bitstream and how they are arranged. thanks for help
Slice equation in bitstream
Started by ●August 17, 2007
Reply by ●August 17, 20072007-08-17
On 17 Aug., 13:22, lembke.ste...@googlemail.com wrote:> hey, > > in FPGA-Editor i can choose a slice and type in an equation for this > block. > i need information, where i can find this equation (truth table) in > the generated bitstream and how > they are arranged. > > thanks for helpnot available fully, need write your RE tools to gain this info you can try generate LL file, but that file doesnt have all the needed some need still heavy RE :( Antti
Reply by ●August 17, 20072007-08-17
i found the location in the bitstream, where 'result-column' can be found. when i use all 4 variables in the function, i can find exact these column of the truth table in the bitstream. (A3*A1)+(A2*A4) 05 37 00 00 => 0000 0101 0011 0111 0000 0000 0000 0000 (is the same, as in the truth table) but when i use less than 4 variables, the bits are not in the right order (but the number of 1's is correct) (A1+A2)*A4 00 77 00 00 => 0000 0000 0111 0111 0000 0000 0000 0000 (in other order) or A1*A3: 05 05 00 00 => 0000 0101 0000 0101 0000 0000 0000 0000
Reply by ●August 17, 20072007-08-17
<lembke.stefan@googlemail.com> wrote in message news:1187349760.044999.83000@19g2000hsx.googlegroups.com...> hey, > > in FPGA-Editor i can choose a slice and type in an equation for this > block. > i need information, where i can find this equation (truth table) in > the generated bitstream and how > they are arranged. > > thanks for help >Hey backatyou, I first did this 20 years ago with Xilinx parts. I guess the method hasn't changed. 1) Make a design. 2) Generate bitstream. 3) Edit function generator in XACT, sorry, FPGA editor. 4) Generate bitstream. 5) See what's changed from 2). Not exactly rocket science, but effective nonetheless. You'll find the CLBs/Slices distributed regularly throughout the bitstream, I bet. HTH., Syms.
Reply by ●August 17, 20072007-08-17
yes, that's the way i go. but don't understand, why the order changes, when i use less than 4 variables ....
Reply by ●August 17, 20072007-08-17
On 17 Aug., 14:28, lembke.ste...@googlemail.com wrote:> i found the location in the bitstream, where 'result-column' can be > found. when i use all 4 variables in the function, i can find exact > these column of the truth table in the bitstream. > > (A3*A1)+(A2*A4) > 05 37 00 00 => 0000 0101 0011 0111 0000 0000 0000 0000 (is the > same, as in the truth table) > > but when i use less than 4 variables, the bits are not in the right > order (but the number of 1's is correct) > > (A1+A2)*A4 > 00 77 00 00 => 0000 0000 0111 0111 0000 0000 0000 0000 (in other > order) > > or > > A1*A3: > 05 05 00 00 => 0000 0101 0000 0101 0000 0000 0000 0000the LUT inputs are swapped randomly duting PR so that explains why the appear in different places think there are some settings to free LUT inputs but that may not always work Antti
Reply by ●August 17, 20072007-08-17
<lembke.stefan@googlemail.com> wrote in message news:1187353683.189676.87220@k79g2000hse.googlegroups.com...>i found the location in the bitstream, where 'result-column' can be > found. when i use all 4 variables in the function, i can find exact > these column of the truth table in the bitstream. > > (A3*A1)+(A2*A4) > 05 37 00 00 => 0000 0101 0011 0111 0000 0000 0000 0000 (is the > same, as in the truth table) > > but when i use less than 4 variables, the bits are not in the right > order (but the number of 1's is correct) > > (A1+A2)*A4 > 00 77 00 00 => 0000 0000 0111 0111 0000 0000 0000 0000 (in other > order) > > or > > A1*A3: > 05 05 00 00 => 0000 0101 0000 0101 0000 0000 0000 0000 >So, firstly, there only 16 bits in the LUT, right. You've written 16. So, let's look at just the first 16 bits of your truth table. In the second example, the A3 bit is 'don't care' so the equation implemented is :- ((A1+A2)*A4 * A3) + ((A1+A2)*A4 * ~A3) HTH., Syms.
Reply by ●August 17, 20072007-08-17
"Symon" <symon_brewer@hotmail.com> wrote in message news:fa44vo$dfg$1@aioe.org...>> > So, firstly, there only 16 bits in the LUT, right? You've written 32. So,Whoops, correction above!
Reply by ●August 17, 20072007-08-17
Reply by ●August 17, 20072007-08-17





