Null statement in VHDL

"Jonathan Bromley" <jonathan.bromley@MYCOMPANY.com> wrote in message 
news:shbmd3pmpmo6sfkqj46lv0ls2dhssq2di0@4ax.com...
> On Tue, 28 Aug 2007 14:26:59 -0000, "comp.arch.fpga"
> <ksulimma@googlemail.com> wrote:
>
>
>>> E.g. Jonathan Bromley posted on 2007 March 5th:
> in comp.lang.vhdl around January 2006.  I tried there to
> argue that synthesis front-ends should support any construct
> that maps to physically realisable hardware, and the back-end
> (mapper) should error-out if the specific target does not
> support the necessary features.  I still think I was right,

I don't recall the thread but I totally agree with you.

> but I don't think my arguments prevailed.  So I have reverted
> to my standard, conservative position that synthesis users
> should restrict themselves to a lowest-common-denominator
> style.

For whatever tools that you have that meet the following two tests, did you 
open a service request?
- Tool claims compliance to VHDL standard
- Tool does not error (or at least warning) about ignoring the initial value 
assignment

If you did not, then (shame on you) and why not?  The way to get tool 
vendors to change their tools is to hit them directly with a service request 
on their tool.  It's not always successful, but I've found that many times 
it is in this type of example since they have been called on a particular 
area of non-compliance on a tool that they say is compliant to a particular 
standard.

> My conservative position must not be taken as an argument
> that we shouldn't try to move forward.  Basically I agree
> with everything Kolja has said; it's just that I am obliged
> to help people to make the best of what they have today -
> and sometimes those people need to write highly portable code.

And publicize against the tools that don't support the language.

KJ