I use the Nios II system to achieve my design. I have define a data bus from the outside of the FPGA, I use a 8-bits PIO ip to connect the signal and the FPGA. I want to achieve the following aim: when the outside signals changes, Nios generates a IRQ to CPU, and I can insert my instructions. Please tell me , how can I do it ?
[Nios II] How Can I define the pio inputs as a interrupt?
Started by ●September 2, 2007
Reply by ●September 2, 20072007-09-02
hezhikuan2007@gmail.com wrote:> I want to achieve the following aim: when the outside signals > changes, Nios generates a IRQ to CPU, and I can insert my > instructions.Read Chapter 13 of the QUartus II Handbook Volume 5. (aka n2cpu_nii51007-2.pdf) Or if that's not quite what you need, create a (trivial) SOPC component that generates an interrupt when you need to. Regards, -- Mark McDougall, Engineer Virtual Logic Pty Ltd, <http://www.vl.com.au> 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266
Reply by ●September 3, 20072007-09-03