load/read/ commands assembly PowerPC. Help Needed!

Hello all,

I am trying to load a 32bit data (word) from the PortB of a BRAM to a
GPR (general purpose register) of the PowerPC.

Address Map for Processor ppc405_0
(0b0000010000-0b0000010011) ppc405_0
(0b0000100000-0b0000100011) ppc405_0
(0xa0008000-0xa000ffff) docm_cntlr docm
(0xffff8000-0xffffffff) iocm_cntlr iocm

i am using the LWZ command like LWZ r1, r1 (0xa0008001) but is not
working. which is the right syntax for the specific adresses?

regards

On Sep 6, 8:30 am, xenix <last...@gmail.com> wrote:
> Hello all,
>
> I am trying to load a 32bit data (word) from the PortB of a BRAM to a
> GPR (general purpose register) of the PowerPC.
>
> Address Map for Processor ppc405_0
> (0b0000010000-0b0000010011) ppc405_0
> (0b0000100000-0b0000100011) ppc405_0
> (0xa0008000-0xa000ffff) docm_cntlr docm
> (0xffff8000-0xffffffff) iocm_cntlr iocm
>
> i am using the LWZ command like LWZ r1, r1 (0xa0008001) but is not
> working. which is the right syntax for the specific adresses?
>
> regards



How is it not working? Not compiling, or not getting the data you
expect?  What are you compiling with, and do you have the MMU of the
PowerPC turned on?

Regards,

John McCaskill
www.fastertechnology.com

>
> How is it not working? Not compiling, or not getting the data you
> expect?  What are you compiling with, and do you have the MMU of the
> PowerPC turned on?
>
> Regards,
>
> John McCaskillwww.fastertechnology.com


No this is the only code i am using to initialize the Brams and
following to make the project active. I dont have MMU IP. It is
crucial to have mmu? no i do not have the expected data, when i am
simulationing it, it is uses more GPR than the ones mentioned above.
Actually i am using the iocm controller for the instrution and the
Docm for the data when i make a linker file. i dont know if there is
the problem. Also some data getting into the GPRs but after some
simulation time the registers becomes as XXXXX.

i am using a testbench which is connected to the Port B's signals and
declared as external. so i am feeding with specific data and specific
addresses for the data. Probably the problem might located there.
Because in the system assembly view windows the PORT B of the BRAM is
shown as "unconnected" even when these signals are made from be as
"external" . Do you think that the netlist might not been produced by
the EDK?

thank you all. you are very help full with a newbi in FPGA.

regards

yes the MMU function of the PowerPC is ON.

Regards

On Sep 7, 3:25 am, xenix <last...@gmail.com> wrote:
> yes the MMU function of the PowerPC is ON.
>
> Regards



What software are you running on the PowerPC? How does it set up the
MMU?  I could set it up with a 1:1 mapping of virtual to physical
memory, but it could also set up some other mapping in which case you
need to know the virtual address of the memory you are trying to
access.

Since you are running this in a simulator, you should be able to see
everything that is going on.  Do you see the PowerPC read from the
expected address?  Do you see your testbench writing the data to the
BRAM?

Regards,

John McCaskill
www.fastertechnology.com

Correct syntax for the assembly would be:
	lis r1, 0xa0008001@h
	ori r1,r1,0xa0008001@l
	lwz r1, 0(r1)

The first two lines load the address into r1. The third line reads the 
value at the address of r1 and stores it in r1 (overwriting the address 
in r1).

- Peter


xenix wrote:
> Hello all,
> 
> I am trying to load a 32bit data (word) from the PortB of a BRAM to a
> GPR (general purpose register) of the PowerPC.
> 
> Address Map for Processor ppc405_0
> (0b0000010000-0b0000010011) ppc405_0
> (0b0000100000-0b0000100011) ppc405_0
> (0xa0008000-0xa000ffff) docm_cntlr docm
> (0xffff8000-0xffffffff) iocm_cntlr iocm
> 
> i am using the LWZ command like LWZ r1, r1 (0xa0008001) but is not
> working. which is the right syntax for the specific adresses?
> 
> regards
> 

Peter Really thanx. :)

Do i have to use
 "lis r1, 0xa0008001@h"  or "lis r1, 0xa0008001@ha"? what is the
difference of them?

Yes it is loading the correct data now. but i would like to ask why it
is loading before the correct data some others before? and why at the
end they become all zeros?. When i am loading the bram with data i
load it like this:

 WAIT FOR 40 ns;
		dsocm_bram_BRAM_WEN_B_pin  <= transport "1111" ;
		dsocm_bram_BRAM_Addr_B_pin <= transport
std_logic_VECTOR'("10100000000000001000000000000100"); --1 -- A0008004
-Word 1
		dsocm_bram_BRAM_Dout_B_pin <= transport
std_logic_VECTOR'("00000000000000000001000100010001"); --1111


This is, A0008004,  the second location form the location range 0-255?
or for the second location of the Bram the address should be :
socm_bram_BRAM_Addr_B_pin <= transport
std_logic_VECTOR'("00000000000000000000000000000010"); --1 --

regards

Peter Really thanx. :)

Do i have to use
 "lis r1, 0xa0008001@h"  or "lis r1, 0xa0008001@ha"? what is the
difference of them?

Yes it is loading the correct data now. but i would like to ask why it
is loading before the correct data some others before? and why at the
end they become all zeros?. When i am loading the bram with data i
load it like this:

 WAIT FOR 40 ns;
		dsocm_bram_BRAM_WEN_B_pin  <= transport "1111" ;
		dsocm_bram_BRAM_Addr_B_pin <= transport
std_logic_VECTOR'("10100000000000001000000000000100"); --1 -- A0008004
-Word 1
		dsocm_bram_BRAM_Dout_B_pin <= transport
std_logic_VECTOR'("00000000000000000001000100010001"); --1111


This is, A0008004,  the second location form the location range 0-255?
or for the second location of the Bram the address should be :
socm_bram_BRAM_Addr_B_pin <= transport
std_logic_VECTOR'("00000000000000000000000000000010"); --1 --

regards

>From the above assembly code can do  the same with the MTDCR and MFDCR
instructions? Or the logic of writting the assembly is totally
different? I am asking because i have added a DCR IP in my design.

 Also another question is that the "S_bramenable"  signal. Who i can
set when i want to enable to reade from the Slave or not?


regards
xenix

probably the problem is in the offset address. my system  has
addresses:

Address Map for Processor ppc405_0
  (0b0000010000-0b0000010011) ppc405_0
  (0b0000100000-0b0000100011) ppc405_0
  (0000000000-0x00003fff) plb_bram_if_cntlr_1	plb
  (0x80000000-0x80007fff) docm_cntlr	docm
  (0xffff8000-0xffffffff) iocm_cntlr	iocm
Address map generated successfully.

When i am loading data in the DSOCM_ BRAM from PORT B i am giving it
like:

In VHDL -->        dsocm_bram_BRAM_EN_B_pin  <= '1';
  	                 dsocm_bram_BRAM_WEN_B_pin <= ("1111");
                         dsocm_bram_BRAM_Addr_B_pin <= (X"00000010");
-- memory location
                         dsocm_bram_BRAM_Dout_B_pin <= (X"00000444");
-- 32bits data

In Inline Assembly-->  asm(" lis 5,0x80000010@ha");
                                asm(" lwz 5,0x80000010@l(5)");


So if i am right the offset of the DSOCM is 0x8000000F(offset)   and
the address location i am wirting in the Bram is ( 0x00000010)  then i
have to read (from the inline assembly code) from location 0x8000000F
- 0x00000010 = 0x7FFFFFFF

i.e asm(" lis 5,0x7FFFFFFF @ha");
   asm(" lwz 5,0x7FFFFFFF@l(5)");

where i am doing wrong on that?

Regards and really thanx :)

xenix