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FPGA input level conversion

Started by Unknown October 19, 2007
                        +----------* +3,3V output
                       ---
                       | | R=66 ohm
                       | | 
                       ---
                        |
                       ----
                       \  /  CDBU00340 or similar Vf=0.6
                        \/
                       ----
                        |
  FPGA +2,5V input *----+
  
               GND *---------------* GND

Is it possible to use the above construction to adapt a 3,3V signal to a 
level acceptable for 2,5V FPGA Vccaux input ..?
And thus eliminate or significantly reduce the need for a shunt resistor as
mentioned in XAPP453 page 5 "Managing Reverse Current" ..?

Maybe one could use R=1000 ohm to further reduce the reverse current.
As (3.3-2.5-Vf)/I_leak = 8000 ohm. I_leak = 0.000025 Amp (ds099.pdf p58).

The original idea was to not need any resistor at but as a component with a
suitable Vf seems hard to find. I thought this solution will at least reduce
the problem.

http://www.xilinx.com/bvdocs/appnotes/xapp453.pdf
pbFJqKD@ludd.invalid wrote:
> +----------* +3,3V output > --- > | | R=66 ohm > | | > --- > | > ---- > \ / CDBU00340 or similar Vf=0.6 > \/ > ---- > | > FPGA +2,5V input *----+ > > GND *---------------* GND
> Is it possible to use the above construction to adapt a 3,3V signal to a > level acceptable for 2,5V FPGA Vccaux input ..? > And thus eliminate or significantly reduce the need for a shunt resistor as > mentioned in XAPP453 page 5 "Managing Reverse Current" ..?
> Maybe one could use R=1000 ohm to further reduce the reverse current. > As (3.3-2.5-Vf)/I_leak = 8000 ohm. I_leak = 0.000025 Amp (ds099.pdf p58).
> The original idea was to not need any resistor at but as a component with a > suitable Vf seems hard to find. I thought this solution will at least reduce > the problem.
Use level-Shifters, like 74LVC8T245 or "translating bus switches" like SN74CB3T1. They don't cost that much, require a single footprint and have much better signal integrety. E.g. you diode solution above will have long fall times, leading to irregular switching caused by noise and to current surges in the input buffer caused by the input drifting slowly through the linear region. -- Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Uwe Bonnes <bon@hertz.ikp.physik.tu-darmstadt.de> wrote:
>pbFJqKD@ludd.invalid wrote: >> +----------* +3,3V output >> --- >> | | R=66 ohm >> | | >> --- >> | >> ---- >> \ / CDBU00340 or similar Vf=0.6 >> \/ >> ---- >> | >> FPGA +2,5V input *----+ >> >> GND *---------------* GND
>> Is it possible to use the above construction to adapt a 3,3V signal to a >> level acceptable for 2,5V FPGA Vccaux input ..? >> And thus eliminate or significantly reduce the need for a shunt resistor as >> mentioned in XAPP453 page 5 "Managing Reverse Current" ..?
>> Maybe one could use R=1000 ohm to further reduce the reverse current. >> As (3.3-2.5-Vf)/I_leak = 8000 ohm. I_leak = 0.000025 Amp (ds099.pdf p58).
>> The original idea was to not need any resistor at but as a component with a >> suitable Vf seems hard to find. I thought this solution will at least reduce >> the problem.
>Use level-Shifters, like 74LVC8T245 or "translating bus switches" like >SN74CB3T1. They don't cost that much, require a single footprint and have >much better signal integrety. E.g. you diode solution above will have long >fall times, leading to irregular switching caused by noise and to current >surges in the input buffer caused by the input drifting slowly through the >linear region.
Would it work for 6 MHz frequency as a simple solution ..? What chip do you recommend for 5,0V -> 3,3V ..?
pbFJKD@ludd.invalid wrote:
...
> Would it work for 6 MHz frequency as a simple solution ..?
Without a pulldown on the cathode side of the diode, I guess it will not work at 6 MHz.
> What chip do you recommend for 5,0V -> 3,3V ..?
If the 5 V side also receives signals from the 3.3 Volt side, a 74LVC8T245 (or 1T or 2T) will deliver true 5 Volt CMOS signals on the 5 Volt side. This makes sense it current consumption is an issue for you. Otherwise a FET switch like the sn74cbtd3861 doesn't need a direction signal. -- Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Why is there a diode in your schematic?

It is not mentioned in the app note, nor is it needed.

The input clamp will prevent an overvoltage on the input, and all that
is required is a series resistor to limit the total injected current
into all inputs from "pushing up" the Vcco supply.

Yes, a level translator is best for higher speeds, but at the speed you
mentioned, a simple single resistor per input is all you need.

Austin
The shunt,

Is only required if the Vcco is not drawing enough current, and is
sourced from all IO's when they are high.  Best at a slow speed is to
plan on increasing the series R until the Vcco is not pushed up when
inputs drive high.

Or, use ONE resistor across Vcco to ground to keep Vcco from going
higher than 2.5V.

Why add one diode per pin, when one resistor (shunt to ground from Vcco)
per FPGA only is all that you need to add?

And, the answer to your question "will this circuit work" is no, as the
diode is only 0.6v, and 3.3-0.6=2.7, and you may still be pushing your
Vcco out of regulation when all inputs are high (and you may still need
a shunt to ground on Vcco).

Austin

austin wrote:
> Why is there a diode in your schematic? > > It is not mentioned in the app note, nor is it needed. > > The input clamp will prevent an overvoltage on the input, and all that > is required is a series resistor to limit the total injected current > into all inputs from "pushing up" the Vcco supply. > > Yes, a level translator is best for higher speeds, but at the speed you > mentioned, a simple single resistor per input is all you need. > > Austin
austin <austin@xilinx.com> wrote:
> The shunt,
> Is only required if the Vcco is not drawing enough current, and is > sourced from all IO's when they are high. Best at a slow speed is to
Did you look at pbft's circuit proposal. Without a pull-down, the high-low transistion is not defined. -- Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Uwe,

Do we care at 6 MHz?

If the Cin of the pin is ~10 pf, and the R is 100 ohms, then .7RC =

1E-11 * 1E2 = 1E-9 seconds, or 1 nsec...

Of course, added to R=100 ohms is his driver's output pull down resistance.

Austin

Uwe Bonnes wrote:
> austin <austin@xilinx.com> wrote: >> The shunt, > >> Is only required if the Vcco is not drawing enough current, and is >> sourced from all IO's when they are high. Best at a slow speed is to > > Did you look at pbft's circuit proposal. Without a pull-down, the high-low > transistion is not defined.
Miscommunication:
Austin says: without the diode, there is no speed problem at 6 MHz
Uwe says: with the diode the falling edge is undefined.
Both are right, of course...
Peter Alfke

On Oct 19, 3:45 pm, austin <aus...@xilinx.com> wrote:
> Uwe, > > Do we care at 6 MHz? > > If the Cin of the pin is ~10 pf, and the R is 100 ohms, then .7RC = > > 1E-11 * 1E2 = 1E-9 seconds, or 1 nsec... > > Of course, added to R=100 ohms is his driver's output pull down resistance. > > Austin > > Uwe Bonnes wrote: > > austin <aus...@xilinx.com> wrote: > >> The shunt, > > >> Is only required if the Vcco is not drawing enough current, and is > >> sourced from all IO's when they are high. Best at a slow speed is to > > > Did you look at pbft's circuit proposal. Without a pull-down, the high-low > > transistion is not defined.
On 2007-10-19, Uwe Bonnes <bon@hertz.ikp.physik.tu-darmstadt.de> wrote:
> Use level-Shifters, like 74LVC8T245 or "translating bus switches" like > SN74CB3T1.
If you just need one bit you can get small packages like SN74CBT1G125, one fet switch in a SOT-23 package. One thing to beware of is that "first generation" (?) but switches like QS3384 (and the part I mentioned above) dropped about 1V from their supply, so 5.0->3.3 used a QS3384 with 4.3V (via a single diode from the 5V). When I had to replace one of those on a proto board, I found most new ones have no or negligible drop ("rail to rail") and you power them from the lower rail directly, eg SN74CBTLV3384. -- Ben Jackson AD7GD <ben@ben.com> http://www.ben.com/