Where are the LCD or OLED bitmapped displays?

For the next-generation clock box (1 Hz to 1.5 GHz with ~50 ps
jitter)
I need an LCD-backlit or OLED display,  128 x 64 bits, single or
multiple colors, about 2 inch diagonal.
OSRAM had a nice OLED display, but they went out of that business.
Billions of cellphones, cameras, and iPods are being made, but where
can I buy a couple of hundred displays?
This is holding up a neat project.  :-(
Any help is really appreciated !
Peter Alfke

Peter Alfke <alfke@sbcglobal.net> writes:
> OSRAM had a nice OLED display, but they went out of that business.

http://www.osddisplays.com/

Peter Alfke wrote:

> For the next-generation clock box (1 Hz to 1.5 GHz with ~50 ps
> jitter)
> I need an LCD-backlit or OLED display,  128 x 64 bits, single or
> multiple colors, about 2 inch diagonal.

Only 1.4" diagonal, but a nice 128x128 color display:

http://www.sparkfun.com/commerce/product_info.php?products_id=712

The integrated controller has some graphics primitives already included
(rectangle fill, scrolling etc.), so it is very easy to use (I've tested it
with a microcontroller), but the parallel interface should be fast enough
to refresh the whole display with 60 Hz from FPGAs, too.

Your clock box sounds interesting. How do you manage 50 ps jitter? Is it
possible with your clock box to create e.g. 1.4 GHz and 1.5 GHz with 50%
duty cycle and 50 ps jitter? With my first experiments with DDS, jitter can
be as worse as 1/main clock frequency.

-- 
Frank Buss, fb@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de

On Tue, 1 Jan 2008 12:07:17 -0800 (PST), Peter Alfke
<alfke@sbcglobal.net> wrote:

>
>For the next-generation clock box (1 Hz to 1.5 GHz with ~50 ps
>jitter)

50 ps jitter at 1 Hz? That *is* a neat project!

When can I buy one? I was considering getting one of the SRS clock
boxes, but yours might do.

John

Thanks, Frank, for the URL. I will investigate. A little pricey, but
not out of the question.

Regarding the jitter, I can be more specific in a few weeks, when we
have the pre-production version (with the OSRAM display) really
working. Until now we have used various form of emulation.

Yes, jitter is the overwhelming issue, and it is 1/fclock coming out
of the DDS accumulator, about 2 ns.
There is a lot of trickery involved to get the jitter down. The most
demanding chore is reducing "wander", i.e. low-frequency components in
the jitter spectrum that cannot be filtered out by any analog PLL,
but I think we are (almost) there.

We did build a few hundred older boxes for our FAEs some years ago,
and they had <70 ps cycle-to-cycle jitter, although the accumulator
was running at only 160 MHz clock frequency. Some trickery...
The frequency resolution was and is 1 Hz, and the new box has two
independent output channels.

Jitter is a fascinating subject, challenging and also frustrating.
I'll keep you informed...
Happy New Year !
Peter Alfke


On Jan 1, 1:22=A0pm, Frank Buss <f...@frank-buss.de> wrote:
> Peter Alfke wrote:
> > For the next-generation clock box (1 Hz to 1.5 GHz with ~50 ps
> > jitter)
> > I need an LCD-backlit or OLED display, =A0128 x 64 bits, single or
> > multiple colors, about 2 inch diagonal.
>
> Only 1.4" diagonal, but a nice 128x128 color display:
>
> http://www.sparkfun.com/commerce/product_info.php?products_id=3D712
>
> The integrated controller has some graphics primitives already included
> (rectangle fill, scrolling etc.), so it is very easy to use (I've tested i=
t
> with a microcontroller), but the parallel interface should be fast enough
> to refresh the whole display with 60 Hz from FPGAs, too.
>
> Your clock box sounds interesting. How do you manage 50 ps jitter? Is it
> possible with your clock box to create e.g. 1.4 GHz and 1.5 GHz with 50%
> duty cycle and 50 ps jitter? With my first experiments with DDS, jitter ca=
n
> be as worse as 1/main clock frequency.
>
> --
> Frank Buss, f...@frank-buss.dehttp://www.frank-buss.de,http://www.it4-syst=
ems.de

Peter Alfke wrote:

> Thanks, Frank, for the URL. I will investigate. A little pricey, but
> not out of the question.

Instead of a display, you could use a program on a PC. There is always a PC
or laptop nearby. For example I've implemented a simple GUI and a serial
port on the FPGA for my signal generator:

http://www.frank-buss.de/SignalGenerator/

> Yes, jitter is the overwhelming issue, and it is 1/fclock coming out
> of the DDS accumulator, about 2 ns.
> There is a lot of trickery involved to get the jitter down. The most
> demanding chore is reducing "wander", i.e. low-frequency components in
> the jitter spectrum that cannot be filtered out by any analog PLL,
> but I think we are (almost) there.

A PLL sounds like a good idea, if you don't want to change the output
frequency very fast. Maybe I'll try this with my generator and the internal
PLL of the FPGA, if possible.

I wonder how they manage 500 fs (yes, femto seconds) jitter with this cheap
chip:

http://www.analog.com/en/prod/0,2877,AD9540,00.html

Is this the performance of the DDS, or just the jitter the device adds to
the reference clock? But nevertheless, a programmable delay line would be a
nice idea for eliminating jitter, without the need for analog circuits. The
required delay time could be calculated with the current accumulator value
(the bits below the carry).

> Happy New Year !

Thank you, the same to you!

-- 
Frank Buss, fb@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de

On Jan 1, 4:49=A0pm, Frank Buss <f...@frank-buss.de> wrote:
> Peter Alfke wrote:
> > Thanks, Frank, for the URL. I will investigate. A little pricey, but
> > not out of the question.
>
> Instead of a display, you could use a program on a PC. There is always a P=
C
> or laptop nearby. For example I've implemented a simple GUI and a serial
> port on the FPGA for my signal generator:
>
> http://www.frank-buss.de/SignalGenerator/
>
> > Yes, jitter is the overwhelming issue, and it is 1/fclock coming out
> > of the DDS accumulator, about 2 ns.
> > There is a lot of trickery involved to get the jitter down. The most
> > demanding chore is reducing "wander", i.e. low-frequency components in
> > the jitter spectrum that cannot be filtered out by any analog PLL,
> > but I think we are (almost) there.
>
> A PLL sounds like a good idea, if you don't want to change the output
> frequency very fast. Maybe I'll try this with my generator and the interna=
l
> PLL of the FPGA, if possible.
>
> I wonder how they manage 500 fs (yes, femto seconds) jitter with this chea=
p
> chip:
>
> http://www.analog.com/en/prod/0,2877,AD9540,00.html
>
> Is this the performance of the DDS, or just the jitter the device adds to
> the reference clock? But nevertheless, a programmable delay line would be =
a
> nice idea for eliminating jitter, without the need for analog circuits. Th=
e
> required delay time could be calculated with the current accumulator value=

> (the bits below the carry).
>
> > Happy New Year !
>
> Thank you, the same to you!
>
> --
> Frank Buss, f...@frank-buss.dehttp://www.frank-buss.de,http://www.it4-syst=
ems.de

There are wonderful marketing methods for specifying jitter.
Using "RMS" you can divide the  "worst-case cycle-to-cycle jitter"
value by a factor 14.
And worst-case cycle-to-cycle jitter totally ignores the aspect of
"wander".

But also:
Do not under-estimate the performance of a dedicated "cheap" chip.
Have you looked at GPS receiver chips? Astounding !

Gru=DF
Peter Alfke

On Jan 1, 2:40=A0pm, John Larkin
<jjlar...@highNOTlandTHIStechnologyPART.com> wrote:
> On Tue, 1 Jan 2008 12:07:17 -0800 (PST), Peter Alfke
>
> <al...@sbcglobal.net> wrote:
>
> >For the next-generation clock box (1 Hz to 1.5 GHz with ~50 ps
> >jitter)
>
> 50 ps jitter at 1 Hz? That *is* a neat project!
>
> When can I buy one? I was considering getting one of the SRS clock
> boxes, but yours might do.
>
> John

Give us a few months. In the meantime, Stanford Research is a good
choice.
Amazingly cheap for a very complex traditional design.
I'll pack almost everything into one Virtex-5 LXT part. Smaller,
simpler and cheaper.
Peter

Peter Alfke <alfke@sbcglobal.net> writes:
> Billions of cellphones, cameras, and iPods are being made, but where
> can I buy a couple of hundred displays?

http://www.sparkfun.com/

They don't have anything that meets your exact description, but they
probably have something you can live with.

The companies that make such displays don't even want to waste time
talking to a potential customer if that party isn't likely to buy
100K units.

Peter Alfke wrote:
> For the next-generation clock box (1 Hz to 1.5 GHz with ~50 ps
> jitter)
> I need an LCD-backlit or OLED display,  128 x 64 bits, single or
> multiple colors, about 2 inch diagonal.
> OSRAM had a nice OLED display, but they went out of that business.
> Billions of cellphones, cameras, and iPods are being made, but where
> can I buy a couple of hundred displays?

Digikey show 58, and over a dozen in stock.
Highest stock one (also cheapest) shows 1,476 avail - would seem a
good target ?

but WHY do you need a 128x64 dot display, for a Clock generator ?

Is there some driving (marketdroid?) need to display the Xilinx
logo ;)

For under half the price, you can get a nice 	9.22mm H x 4.84mm W Char
16x2, with a
nice large  Viewing Area	99.00mm L x 23.00mm W

-jg