Hi I am designing an 8 layer board with a Virtex 4 device on it. I will have 2 solid ground planes and 2 split power planes. If I have a signal plane that is between a ground and power plane will it matter if I cross a split on the power plane with a signal track. I know that you should not cross a split it in a plane if you are referencing to that plane. But if I have a solid ground plane beneath the track will it use this plane as its reference rather than the power plane. Cheers Jon
Split Plane
Started by ●January 1, 2008
Reply by ●January 1, 20082008-01-01
"maxascent" <maxascent@yahoo.co.uk> wrote in message news:xfKdnTDf__teAefaRVn_vwA@giganews.com...> > Hi > > I am designing an 8 layer board with a Virtex 4 device on it. I will have > 2 solid ground planes and 2 split power planes. If I have a signal plane > that is between a ground and power plane will it matter if I cross a split > on the power plane with a signal track. I know that you should not cross a > split it in a plane if you are referencing to that plane. But if I have a > solid ground plane beneath the track will it use this plane as its > reference rather than the power plane. > > Cheers > > JonHi Jon, There will be an impedance discontinuity at the split. The magnitude of this and whether it matters to your design will depend on the geometry of the stack up and signals; also the rise time of the signals. Why not put the powers on layers 4,5 and make 3 and 6 ground. Then you won't have this problem. HTH., Syms.
Reply by ●January 1, 20082008-01-01
On Tue, 01 Jan 2008 14:04:19 -0600, "maxascent" <maxascent@yahoo.co.uk> wrote:> >Hi > >I am designing an 8 layer board with a Virtex 4 device on it. I will have >2 solid ground planes and 2 split power planes. If I have a signal plane >that is between a ground and power plane will it matter if I cross a split >on the power plane with a signal track. I know that you should not cross a >split it in a plane if you are referencing to that plane. But if I have a >solid ground plane beneath the track will it use this plane as its >reference rather than the power plane. > >Cheers > >JonNo, it doesn't matter. The strange concept of "reference planes" is irrelevent here... how does the signal know what plane you think it's referenced to? If the power planes are bypassed well enough to make them reliable power sources, then they are AC equipotential with the ground plane, so the signal sees them all as ground. And a small slit in a power plane is essentially invisible for edges slower than a few 10's of picoseconds. John
Reply by ●January 1, 20082008-01-01
John Larkin wrote:> On Tue, 01 Jan 2008 14:04:19 -0600, "maxascent" > <maxascent@yahoo.co.uk> wrote: > >> Hi >> >> I am designing an 8 layer board with a Virtex 4 device on it. I will have >> 2 solid ground planes and 2 split power planes. If I have a signal plane >> that is between a ground and power plane will it matter if I cross a split >> on the power plane with a signal track. I know that you should not cross a >> split it in a plane if you are referencing to that plane. But if I have a >> solid ground plane beneath the track will it use this plane as its >> reference rather than the power plane. >> >> Cheers >> >> Jon > > No, it doesn't matter. The strange concept of "reference planes" is > irrelevent here... how does the signal know what plane you think it's > referenced to? > > If the power planes are bypassed well enough to make them reliable > power sources, then they are AC equipotential with the ground plane, > so the signal sees them all as ground. And a small slit in a power > plane is essentially invisible for edges slower than a few 10's of > picoseconds. > > JohnJohn, You're the only person who I won't directly challenge on your assertion because of your experience in producing quality products while confronting these types of issues directly. Suffice it to say that "today's common theory" suggests crossing the split in the specified case - like crossing any split - can be the root of crosstalk and EMI issues in addition to signal fidelity issues, just to a lesser extent than for signals on the outside layers. I'd love to be able to wrap my mind around how crossing this split wouldn't affect the signal in measurable ways, but the things I've been taught - my "faith" perhaps - suggests otherwise. I was once of a mind where crossing the split would be a non-issue but was brought over to the dark side with convincing arguments that tied in mith my more fundamental understanding of transmission line theory. - John_H
Reply by ●January 2, 20082008-01-02
On Tue, 01 Jan 2008 17:41:14 -0800, John_H <newsgroup@johnhandwork.com> wrote:>John Larkin wrote: >> On Tue, 01 Jan 2008 14:04:19 -0600, "maxascent" >> <maxascent@yahoo.co.uk> wrote: >> >>> Hi >>> >>> I am designing an 8 layer board with a Virtex 4 device on it. I will have >>> 2 solid ground planes and 2 split power planes. If I have a signal plane >>> that is between a ground and power plane will it matter if I cross a split >>> on the power plane with a signal track. I know that you should not cross a >>> split it in a plane if you are referencing to that plane. But if I have a >>> solid ground plane beneath the track will it use this plane as its >>> reference rather than the power plane. >>> >>> Cheers >>> >>> Jon >> >> No, it doesn't matter. The strange concept of "reference planes" is >> irrelevent here... how does the signal know what plane you think it's >> referenced to? >> >> If the power planes are bypassed well enough to make them reliable >> power sources, then they are AC equipotential with the ground plane, >> so the signal sees them all as ground. And a small slit in a power >> plane is essentially invisible for edges slower than a few 10's of >> picoseconds. >> >> John > >John, > >You're the only person who I won't directly challenge on your assertion >because of your experience in producing quality products while >confronting these types of issues directly. > >Suffice it to say that "today's common theory" suggests crossing the >split in the specified case - like crossing any split - can be the root >of crosstalk and EMI issues in addition to signal fidelity issues, just >to a lesser extent than for signals on the outside layers. > >I'd love to be able to wrap my mind around how crossing this split >wouldn't affect the signal in measurable ways, but the things I've been >taught - my "faith" perhaps - suggests otherwise. I was once of a mind >where crossing the split would be a non-issue but was brought over to >the dark side with convincing arguments that tied in mith my more >fundamental understanding of transmission line theory. > >- John_Hground============================================================ signal------------------------------------------------------------ power ======================== ================================= whatever ======================================================== OK, there's a slit in the power plane. It's probably about as wide as a normal trace width, call it 8 mils. Let's say the plane-plane spacings are similar distances. Both halves of the split power plane are bypassed to the ground plane by real capacitors and by the considerable large-area plane-plane capacitance. In order for the trace impedance to change as the trace cruises over the gap, the potential in the middle of the gap would have to be non-zero. But the electric field from the signal trace can hardly penetrate through the gap... that's simple electrostatics. The signal sees uniform ground above, and a slightly lower dielectric constant below, in the gap region. That raises the trace impedance a tiny bit just above the gap, for a tiny distance. The "reference plane" issue is silly, as all the planes are at AC ground. I've built and TDR's such structures to better than 30 ps resolution. A reflection from such a gap is lost in the normal impedance noise, caused by thickness variations and the glass weave in the board. In the nanosecond domain, it's totally invisible. On a 2-sided board, a microstrip trace on one side and a cut ground plane on the other, signal----------------------------------- ground================== ============== a narrow slit in the ground plane is still a tiny impedance discontinuity on a TDR plot. All this "reference plane" stuff is ludicrous. It sure ain't "transmission line theory", it's folklore. John
Reply by ●January 2, 20082008-01-02
"John Larkin" <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote in message news:fh7mn3pl84g9ccugdov2vml0nfg3f8le45@4ax.com...> All this "reference plane" stuff is ludicrous. It sure ain't > "transmission line theory", it's folklore.It's aimed at getting people to not use *large* slits in their ground planes that *could* turn into significant problems. And you can certainly run simulations and show that -- if you choose a low enough frequency -- current will divert around the slit, like Howard and friends like to draw diagrams of in their books. The problem is that once everyone nods their heads up and down that, ok, sure, slits in the plane affect what happens electromagnetically, where many people (include me) get off-track in their thinking is in overestimating the detrimental impact of a small slit here or there, when in acutality even significant impedance bumps (say, +/-20% of "nominal" --> 50 ohms nomial going to ~40-60 ohms) of "reasonable" electrical length just don't perturb signals much at all. If they did, simple things like connectors would start becoming Big Deals down in the MHz range rather than the some- to many-GHz range where they usually do. That being said, I've observed co-workers trying to do things like obtain 60dB isolation at 3GHz on regular old FR-4 circuit boards, and it's not trivial. Without careful design, it's easy to get only, say, 40dB isolation between two traces, even though that's just a *miniscule* amount of energy loss than you're never going to miss it from the original transmitted signal. This is the angle the EMI guys are coming from: While here-a-slit, there-a-slit isn't going to significantly alter your transmitted signal one bit (i.e., your box will still work fine), it can easily cause you to fail EMI testing if you're not careful to make sure those 40-60dB down "sneak" paths never make it out of the box. I did hear a lecture from one guy who mentioned that if you already have bad enough self-interference (e.g., ground bounce and crosstalk) that your box doesn't work as intended, don't even bother doing an EMI test -- you're already guaranteed to fail. :-) Have you ever measured the isolation between output channels on your function generators, John? I'd be curious to know the results... :-) ---Joel
Reply by ●January 2, 20082008-01-02
Symon wrote:> "maxascent" <maxascent@yahoo.co.uk> wrote in message > news:xfKdnTDf__teAefaRVn_vwA@giganews.com...>>I am designing an 8 layer board with a Virtex 4 device on it. I will have >>2 solid ground planes and 2 split power planes. If I have a signal plane >>that is between a ground and power plane will it matter if I cross a split >>on the power plane with a signal track. I know that you should not cross a >>split it in a plane if you are referencing to that plane. But if I have a >>solid ground plane beneath the track will it use this plane as its >>reference rather than the power plane.The current in the two will be proportional to the capacitance (per unit length), which will depend on the dielectric constant and thickness of the dielectric.> There will be an impedance discontinuity at the split.Well, the impedance is the same on both sides, but getting the current where it is needs to go is the problem. As someone else mentioned, bypass capacitors will help. You could put a capacitor across the split between the two power planes. Capacitors to ground from each side should also work. As someone else mentioned, the capacitance of the power plane itself might be enough.> The magnitude of this > and whether it matters to your design will depend on the geometry of the > stack up and signals; also the rise time of the signals. Why not put the > powers on layers 4,5 and make 3 and 6 ground. Then you won't have this > problem.The impedance will be higher, but otherwise it should work. -- glen
Reply by ●January 2, 20082008-01-02
"John Larkin" <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote in message news:fh7mn3pl84g9ccugdov2vml0nfg3f8le45@4ax.com...> > In order for the trace impedance to change as the trace cruises over > the gap, the potential in the middle of the gap would have to be > non-zero. But the electric field from the signal trace can hardly > penetrate through the gap... that's simple electrostatics. The signal > sees uniform ground above, and a slightly lower dielectric constant > below, in the gap region. That raises the trace impedance a tiny bit > just above the gap, for a tiny distance. The "reference plane" issue > is silly, as all the planes are at AC ground. >Hi John, I contend that the flaw in your thinking is that you are _only_ considering "electrostatics", i.e. the electric field and associated capacitance of the system. If you only understand voltage and capacitance, the slot is not a problem for you. In fact, by the reasoning you follow above, a big slot in both planes wouldn't be a problem, and I think this is what you're saying. Unfortunately, back in the real world, it's called electromagnetism. The magnetic field is important in these systems. The slit will affect the system, changing the loop area for the currents flowing, and the faster the rise time, the more effect you will see due to this added inductance. The effect may or may not be important, but what is important is to consider it. I'm gonna try this again. I think you do accept that current flows along the trace, so where does the return current flow? Here's a clue. It's in the planes. So, the current is flowing in a loop, right? And a loop has inductance, right? And a big slot in the plane will make the loop area bigger, right? And a bigger area loop has more inductance, right? However, the two of us have been here before, and I know you don't believe this. I'm posting for the benefit of others who might be caught out by ignoring the magnetic field set up by the currents in the planes and traces so they can make up their own minds. (I suggest SI-list for further reading) Up until recently, regular FPGA I/O circuits were not quick enough for this to be a big problem, but they will be for everyone soon. Maybe not today. Maybe not tomorrow, but soon and for the rest of your life! I know this won't help, Syms. p.s. I agree, having a slot in only one plane is nowhere near the same as a slot in both. Here's a link for why a single reference plane with a slot is bad. It's easy to see that another plane can all but short out the return current. http://www.hottconsultants.com/techtips/tips-slots.html
Reply by ●January 2, 20082008-01-02
"Joel Koltner" <zapwireDASHgroups@yahoo.com> wrote in message news:13nmc65efhaqv29@corp.supernews.com...> > Have you ever measured the isolation between output channels on your > function generators, John? I'd be curious to know the results... :-) > > ---Joel > >Hi Joel, Good post, thanks! I also would be interested in the answer to the question you pose! Cheers, Syms.
Reply by ●January 2, 20082008-01-02
"Symon" <symon_brewer@hotmail.com> wrote:>"John Larkin" <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote in message >news:fh7mn3pl84g9ccugdov2vml0nfg3f8le45@4ax.com... >> >> In order for the trace impedance to change as the trace cruises over >> the gap, the potential in the middle of the gap would have to be >> non-zero. But the electric field from the signal trace can hardly >> penetrate through the gap... that's simple electrostatics. The signal >> sees uniform ground above, and a slightly lower dielectric constant >> below, in the gap region. That raises the trace impedance a tiny bit >> just above the gap, for a tiny distance. The "reference plane" issue >> is silly, as all the planes are at AC ground. >> >Hi John, > >I contend that the flaw in your thinking is that you are _only_ considering >"electrostatics", i.e. the electric field and associated capacitance of the >system. If you only understand voltage and capacitance, the slot is not a >problem for you. In fact, by the reasoning you follow above, a big slot in >both planes wouldn't be a problem, and I think this is what you're saying. > >Unfortunately, back in the real world, it's called electromagnetism. The >magnetic field is important in these systems. The slit will affect the >system, changing the loop area for the currents flowing, and the faster the >rise time, the more effect you will see due to this added inductance. The >effect may or may not be important, but what is important is to consider it. > >I'm gonna try this again. I think you do accept that current flows along the >trace, so where does the return current flow? Here's a clue. It's in the >planes. So, the current is flowing in a loop, right? And a loop has >inductance, right? And a big slot in the plane will make the loop area >bigger, right? And a bigger area loop has more inductance, right?If I may interfere. I believe John is right in stating that all power planes are AC coupled through almost zero impedance. Hence, the return current will not go around the slit but 'jumps along' with the signal. At high frequencies, the trace will act as a microstrip line *. *All this assuming there is a continuous ground plane. -- Reply to nico@nctdevpuntnl (punt=.) Bedrijven en winkels vindt U op www.adresboekje.nl
