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ieee_ proposed library

Started by FPGA January 14, 2008
Hello all,

I am trying to use some of the proposed functions by IEEE which are
still awaiting approval. http://www.vhdl.org/vhdl-200x/vhdl-200x-ft/packages/float_pkg_c.vhdl

I am getting the following errors
**Error: C:/Modeltech_pe_edu_6.3c/examples/util_top.vhd(58): Library
ieee_proposed not found.
** Error: C:/Modeltech_pe_edu_6.3c/examples/util_top.vhd(59):
(vcom-1136) Unknown identifier "ieee_proposed".
** Error: C:/Modeltech_pe_edu_6.3c/examples/util_top.vhd(60):
(vcom-1136) Unknown identifier "ieee_proposed".
** Error: C:/Modeltech_pe_edu_6.3c/examples/util_top.vhd(67): VHDL
Compiler exiting

I have copied the zip file vhdl-200x-pkgs_18 available at
http://www.vhdl.org/vhdl-200x/vhdl-200x-ft/packages/files.html. I now
have a folder vhdl-200x-pkgs_18 which is the unzipped version. How do
I include this as a library? I have renamed the folder to
ieee_proposed and it still gives me the same errors.

I am using ModelsimPE Student Edition 6.3c

Thanks
FPGA wrote:

> **Error: C:/Modeltech_pe_edu_6.3c/examples/util_top.vhd(58): > Library ieee_proposed not found.
vlib ieee_proposed vcom -work ieee_proposed somefile.vhd vcom -work ieee_proposed someotherfile.vhd ... etc -- Mike Treseler
I would suggest not using the propossed functions unless you are required 
to.

Unless those functions have been donated by a synthesis company they are 
highley unlikely to be supported when you need to synthesize to gates.


"FPGA" <FPGA.unknown@gmail.com> wrote in message 
news:113ff161-5e90-43f8-9c06-7da9ca92db65@s12g2000prg.googlegroups.com...
> Hello all, > > I am trying to use some of the proposed functions by IEEE which are > still awaiting approval. > http://www.vhdl.org/vhdl-200x/vhdl-200x-ft/packages/float_pkg_c.vhdl > > I am getting the following errors > **Error: C:/Modeltech_pe_edu_6.3c/examples/util_top.vhd(58): Library > ieee_proposed not found. > ** Error: C:/Modeltech_pe_edu_6.3c/examples/util_top.vhd(59): > (vcom-1136) Unknown identifier "ieee_proposed". > ** Error: C:/Modeltech_pe_edu_6.3c/examples/util_top.vhd(60): > (vcom-1136) Unknown identifier "ieee_proposed". > ** Error: C:/Modeltech_pe_edu_6.3c/examples/util_top.vhd(67): VHDL > Compiler exiting > > I have copied the zip file vhdl-200x-pkgs_18 available at > http://www.vhdl.org/vhdl-200x/vhdl-200x-ft/packages/files.html. I now > have a folder vhdl-200x-pkgs_18 which is the unzipped version. How do > I include this as a library? I have renamed the folder to > ieee_proposed and it still gives me the same errors. > > I am using ModelsimPE Student Edition 6.3c > > Thanks
"FPGA" <FPGA.unknown@gmail.com> wrote in message 
news:113ff161-5e90-43f8-9c06-7da9ca92db65@s12g2000prg.googlegroups.com...
> Hello all, > > I am trying to use some of the proposed functions by IEEE which are > still awaiting approval. > http://www.vhdl.org/vhdl-200x/vhdl-200x-ft/packages/float_pkg_c.vhdl >
..
> > I am using ModelsimPE Student Edition 6.3c
I am not sure about the Student Edition but in the commercial PE version (I use 6.3d) these packages are already supplied as standard. Have a look in your <your_mti_installation_dir>\vhdl_src\floatfixlib\ directory. In my PE version they are compiled into floatfixlib: Library floatfixlib; use floatfixlib.float_pkg.all; signal A32,B32:float(8 downto -23); signal Y32 : float(8 downto -23); A32 <= "01000000110100000000000000000000" ; -- 6.5 B32 <= to_float(3.23, B32); -- size using B32 Y32 <= A32 + B32 ; These are great libraries and very easy to use. The only problem is that the waveform doesn't have an option to display them properly. Hans www.ht-lab.com
> > Thanks
On Jan 15, 3:58=A0am, "HT-Lab" <han...@ht-lab.com> wrote:
> "FPGA" <FPGA.unkn...@gmail.com> wrote in message > > news:113ff161-5e90-43f8-9c06-7da9ca92db65@s12g2000prg.googlegroups.com... > > > Hello all, > > > I am trying to use some of the proposed functions by IEEE which are > > still awaiting approval. > >http://www.vhdl.org/vhdl-200x/vhdl-200x-ft/packages/float_pkg_c.vhdl > > .. > > > I am using ModelsimPE Student Edition 6.3c > > I am not sure about the Student Edition but in the commercial PE version (=
I
> use 6.3d) these packages are already supplied as standard. Have a look in > your <your_mti_installation_dir>\vhdl_src\floatfixlib\ directory. > > In my PE version they are compiled into floatfixlib: > > Library floatfixlib; > use floatfixlib.float_pkg.all; > > signal A32,B32:float(8 downto -23); > signal Y32 : float(8 downto -23); > > A32 <=3D "01000000110100000000000000000000" ; -- 6.5 > > B32 <=3D to_float(3.23, B32); -- size using B32 > Y32 <=3D A32 + B32 ; > > These are great libraries and very easy to use. The only problem is that t=
he
> waveform doesn't have an option to display them properly. > > Hanswww.ht-lab.com > > > > > > > Thanks- Hide quoted text - > > - Show quoted text -
I appreciate your help. I will try to use the floatfixlib library you mentioned and see how it goes.
On Jan 15, 10:20=A0am, FPGA <FPGA.unkn...@gmail.com> wrote:
> On Jan 15, 3:58=A0am, "HT-Lab" <han...@ht-lab.com> wrote: > > > > > > > "FPGA" <FPGA.unkn...@gmail.com> wrote in message > > >news:113ff161-5e90-43f8-9c06-7da9ca92db65@s12g2000prg.googlegroups.com...=
> > > > Hello all, > > > > I am trying to use some of the proposed functions by IEEE which are > > > still awaiting approval. > > >http://www.vhdl.org/vhdl-200x/vhdl-200x-ft/packages/float_pkg_c.vhdl > > > .. > > > > I am using ModelsimPE Student Edition 6.3c > > > I am not sure about the Student Edition but in the commercial PE version=
(I
> > use 6.3d) these packages are already supplied as standard. Have a look i=
n
> > your <your_mti_installation_dir>\vhdl_src\floatfixlib\ directory. > > > In my PE version they are compiled into floatfixlib: > > > Library floatfixlib; > > use floatfixlib.float_pkg.all; > > > signal A32,B32:float(8 downto -23); > > signal Y32 : float(8 downto -23); > > > A32 <=3D "01000000110100000000000000000000" ; -- 6.5 > > > B32 <=3D to_float(3.23, B32); -- size using B32 > > Y32 <=3D A32 + B32 ; > > > These are great libraries and very easy to use. The only problem is that=
the
> > waveform doesn't have an option to display them properly. > > > Hanswww.ht-lab.com > > > > Thanks- Hide quoted text - > > > - Show quoted text - > > I appreciate your help. I will try to use the floatfixlib library you > mentioned and see how it goes.- Hide quoted text - > > - Show quoted text -
I am getting the following error when i try to make ieee_proposed library. Modelsim > vcom -work ieee_proposed float_pkg_c.vhd # Model Technology ModelSim PE Student Edition vcom 6.3c Compiler 2007.09 Sep 11 2007 # ** Error: (vcom-7) Failed to open design unit file "C:Modeltech_pe_edu_6.3cieee_proposed" in read mode. # No such file or directory. (errno =3D ENOENT) # C:/Modeltech_pe_edu_6.3c/win32pe_edu/vcom failed. I was successful is adding the math_utility_pkg.vhdl. I am however getting the same error while adding fixed_pkhg_c.vhd and float_pkg_c.vhd.
On Wed, 23 Jan 2008 14:48:30 -0800 (PST), FPGA
<FPGA.unknown@gmail.com> wrote:

>I am getting the following error when i try to make ieee_proposed >library. >Modelsim > vcom -work ieee_proposed float_pkg_c.vhd ># Model Technology ModelSim PE Student Edition vcom 6.3c Compiler >2007.09 Sep 11 2007 ># ** Error: (vcom-7) Failed to open design unit file >"C:Modeltech_pe_edu_6.3cieee_proposed" in read mode. ># No such file or directory. (errno = ENOENT) ># C:/Modeltech_pe_edu_6.3c/win32pe_edu/vcom failed.
It seems likely that you've used the [vmap] command to map logical library name "ieee_proposed" to physical library directory "C:\Modeltech_pe_edu_6.3c\ieee_proposed" and the backslashes have been stripped by Tcl. Change the mapping to have forward slashes in the pathname, and all should be well. Also, to play safe, take a look in the currently-applicable "modelsim.ini" file and see if there are backslashes in the library-mapping pathnames there - if so, replace them with forward-slash. -- Jonathan Bromley, Consultant DOULOS - Developing Design Know-how VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK jonathan.bromley@MYCOMPANY.com http://www.MYCOMPANY.com The contents of this message may contain personal views which are not the views of Doulos Ltd., unless specifically stated.
On Jan 23, 5:54=A0pm, Jonathan Bromley <jonathan.brom...@MYCOMPANY.com>
wrote:
> On Wed, 23 Jan 2008 14:48:30 -0800 (PST), FPGA > > <FPGA.unkn...@gmail.com> wrote: > >I am getting the following error when i try to make ieee_proposed > >library. > >Modelsim > vcom -work ieee_proposed float_pkg_c.vhd > ># Model Technology ModelSim PE Student Edition vcom 6.3c Compiler > >2007.09 Sep 11 2007 > ># ** Error: (vcom-7) Failed to open design unit file > >"C:Modeltech_pe_edu_6.3cieee_proposed" in read mode. > ># No such file or directory. (errno =3D ENOENT) > ># C:/Modeltech_pe_edu_6.3c/win32pe_edu/vcom failed. > > It seems likely that you've used the [vmap] command > to map logical library name > =A0 "ieee_proposed" > to physical library directory > =A0 "C:\Modeltech_pe_edu_6.3c\ieee_proposed" > and the backslashes have been stripped by Tcl. > Change the mapping to have forward slashes in the > pathname, and all should be well. =A0Also, to play > safe, take a look in the currently-applicable > "modelsim.ini" file and see if there are backslashes > in the library-mapping pathnames there - if so, > replace them with forward-slash. > -- > Jonathan Bromley, Consultant > > DOULOS - Developing Design Know-how > VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services > > Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK > jonathan.brom...@MYCOMPANY.comhttp://www.MYCOMPANY.com > > The contents of this message may contain personal views which > are not the views of Doulos Ltd., unless specifically stated.
I am still getting the same problem. Is there an alternate way of doing this? Can you please tell me the steps i need to follow to add the ieee_proposed library to Modelsim. Thanks
On Wed, 23 Jan 2008 15:04:35 -0800 (PST), 
FPGA <FPGA.unknown@gmail.com> wrote:

>Can you please tell me the steps i need to follow to add the >ieee_proposed library to Modelsim.
Not precisely, because it depends on the location of things in your setup. I would do something like this... vlib c:/existing/directory/ieee_proposed_lib vmap ieee_proposed c:/existing/directory/ieee_proposed_lib vcom -work ieee_proposed c:/source/directory/float_pkg_c.vhd Note also that any pathname containing spaces MUST be enclosed in quotes "" or braces {} so that Tcl does not interpret the spaces as word separators. As usual, once you've done the "vlib" and "vmap" commands you don't need to do them again; the library mapping will be written into the local modelsim.ini file and will then be used automatically whenever you run ModelSim in that directory. Ghastly thought: You're not actually running Modelsim in its installation directory, are you? That's disastrous because it has a read-only modelsim.ini file. Make sure you've changed Modelsim's working directory to some place where you have full read/write access. HTH -- Jonathan Bromley, Consultant DOULOS - Developing Design Know-how VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK jonathan.bromley@MYCOMPANY.com http://www.MYCOMPANY.com The contents of this message may contain personal views which are not the views of Doulos Ltd., unless specifically stated.
On Jan 24, 4:17=A0am, Jonathan Bromley <jonathan.brom...@MYCOMPANY.com>
wrote:
> On Wed, 23 Jan 2008 15:04:35 -0800 (PST), > > FPGA <FPGA.unkn...@gmail.com> wrote: > >Can you please tell me the steps i need to follow to add the > >ieee_proposed library to Modelsim. > > Not precisely, because it depends on the location of things > in your setup. =A0I would do something like this... > > =A0 vlib c:/existing/directory/ieee_proposed_lib > =A0 vmap ieee_proposed c:/existing/directory/ieee_proposed_lib > =A0 vcom -work ieee_proposed c:/source/directory/float_pkg_c.vhd > > Note also that any pathname containing spaces MUST be > enclosed in quotes "" or braces {} so that Tcl does not > interpret the spaces as word separators. > > As usual, once you've done the "vlib" and "vmap" commands > you don't need to do them again; the library mapping will > be written into the local modelsim.ini file and will then > be used automatically whenever you run ModelSim in that > directory. > > Ghastly thought: You're not actually running Modelsim in > its installation directory, are you? =A0That's disastrous > because it has a read-only modelsim.ini file. =A0Make sure > you've changed Modelsim's working directory to some place > where you have full read/write access. > > HTH > -- > Jonathan Bromley, Consultant > > DOULOS - Developing Design Know-how > VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services > > Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK > jonathan.brom...@MYCOMPANY.comhttp://www.MYCOMPANY.com > > The contents of this message may contain personal views which > are not the views of Doulos Ltd., unless specifically stated.
You are right. I was running Modelsim in the installation directory. Thank you very much for pointing that.