Hi all, I need to drive a 5V CMOS input from a 2.5V Virtex-4 bank. Is there anything wrong with simply using a pullup to 5V? The speed doesn't matter. Thanks.
Virtex-4 driving a 5V CMOS
Started by ●January 24, 2008
Reply by ●January 24, 20082008-01-24
fpgauser <nospam@nospam.com> wrote:> Hi all,> I need to drive a 5V CMOS input from a 2.5V Virtex-4 bank. Is there > anything wrong with simply using a pullup to 5V? The speed doesn't > matter.The output transistors are not rated for 5 Volt. Look for thre zillions of articles about level translation... -- Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Reply by ●January 24, 20082008-01-24
fpgauser wrote:> Hi all, > > I need to drive a 5V CMOS input from a 2.5V Virtex-4 bank. Is there anything > wrong with simply using a pullup to 5V? The speed doesn't matter. > > > Thanks.Depends - is that 5V device rated with TTL thresholds, or CMOS ones ? A virtex OP will not go to 5V, but an open drain one will pull one diode-clamp above 2.5V, and a TTL pin usually has a span of < 0.8V and > 2.0V, with a typical actual threshold of ~1.3V -jg
Reply by ●January 24, 20082008-01-24
On Thu, 24 Jan 2008 15:10:32 -0800 (PST), -jg <Jim.Granville@gmail.com> wrote:>fpgauser wrote: >> Hi all, >> >> I need to drive a 5V CMOS input from a 2.5V Virtex-4 bank. Is there anything >> wrong with simply using a pullup to 5V? The speed doesn't matter. >> >> >> Thanks. > >Depends - is that 5V device rated with TTL thresholds, or CMOS ones ? >A virtex OP will not go to 5V, but an open drain one will pull one >diode-clamp >above 2.5V, and a TTL pin usually has a span of < 0.8V and > 2.0V, >with >a typical actual threshold of ~1.3V > >-jgMost 5-volt cmos parts will draw input-stage shoot-through current if the input isn't close to the 5-volt rails. Some 5-volt parts will get quite hot if Vhigh is, say, 3.3. John
Reply by ●January 25, 20082008-01-25
Generally ir won't work because the clamp diode on the I/O will limit the pullup to a diode drop above the 2.5V i.e. circa 3.2V. You could put a series resistor to the I/O and then pullup but you will need to be careful of the values as they will form a potential divider network. but provided the current through the clamp diode is limited it is usually ok. I think Xilinx have one or more applications note on this. Alternatively put a FET, or single gate logic chip, or bus switch in the way as they are nicer ways to achieve the result. You can see lots examples of bus switches used for this function in a number of our products. John Adair Enterpoint Ltd. - Home of Darnaw1. The PGA FPGA Solution. On 24 Jan, 22:58, "fpgauser" <nos...@nospam.com> wrote:> Hi all, > > I need to drive a 5V CMOS input from a 2.5V Virtex-4 bank. Is there anything > wrong with simply using a pullup to 5V? The speed doesn't matter. > > Thanks.
Reply by ●January 25, 20082008-01-25
> Hi all, > > I need to drive a 5V CMOS input from a 2.5V Virtex-4 bank. Is there > anything > wrong with simply using a pullup to 5V? The speed doesn't matter.This is not recommended practice... the FPGA's protection diodes aren't going to be happy. If you only have 1 signal, and you don't care if it's slow, you can just use a SMD transistor to make an open collector/drain from your FPGA output, or an HCT IC, or an HCT picogate... or even simpler replace your 5V CMOS IC by an HCT if possible. If you need something more elaborate, there are zillions of voltage translator chips...
Reply by ●March 7, 20102010-03-07
> >> Hi all, >> >> I need to drive a 5V CMOS input from a 2.5V Virtex-4 bank. Is there >> anything >> wrong with simply using a pullup to 5V? The speed doesn't matter. > > This is not recommended practice... the FPGA's protection diodes aren't>going to be happy. > If you only have 1 signal, and you don't care if it's slow, you can just>use a SMD transistor to make an open collector/drain from your FPGA >output, or an HCT IC, or an HCT picogate... or even simpler replace your>5V CMOS IC by an HCT if possible. > If you need something more elaborate, there are zillions of voltage >translator chips... >WHAT EVER YOU DO, DO NOT PUT ANY VOLTAGE ON THE I/O LINES GREATER THAN RECOMMENDED BY XILINX DATA SHEET!!!!! I had a pin on a connector short out to a I/O pin of a Virtex II and burned out the diode inside the package. Since speed isn't an issue, do one of two things, have the I/O pin go to an open-buffer with it's output pulled up to 5-V, or many other manners of connecting the pin to the tri-state pin of a open-drain buffer with the input of the buffer to ground and the pulled up to 5-V. --------------------------------------- Posted through http://www.FPGARelated.com
