I would like some guidline on writing a function or process to generate a sine wave and cosine wave. I want to include this into my library. Each time this function/process is called, I would like sine and cosines wave generated. Are there any functions in VHDL which would help us do so. I know there is a function UNIFORM to generate random numbers, not sure if there is anything available for sine and cosine. Your comments are appreciated. Anuja
function/process to generate sine and cosine wave
Started by ●February 6, 2008
Reply by ●February 6, 20082008-02-06
I would like to use the CORDIC function available in math_real to generate the sine and cosine wave. Any inputs on if this is possible would be appreciated.
Reply by ●February 6, 20082008-02-06
FPGA wrote:> I would like some guidline on writing a function or process to > generate a sine wave and cosine wave. I want to include this into my > library. Each time this function/process is called, I would like sine > and cosines wave generated. > > Are there any functions in VHDL which would help us do so. I know > there is a function UNIFORM to generate random numbers, not sure if > there is anything available for sine and cosine. > > Your comments are appreciated. > > > Anujawhat frequency? what resolution? synthesizable or testbench? andraka.com has a good cordic article on it among other things. -Jeff
Reply by ●February 7, 20082008-02-07
On Feb 6, 10:05=A0pm, Jeff Cunningham <j...@sover.net> wrote:> FPGA wrote: > > I would like some guidline on writing a function or process to > > generate a sine wave and cosine wave. I want to include this into my > > library. Each time this function/process is called, I would like sine > > and cosines wave generated. > > > Are there any functions in VHDL which would help us do so. I know > > there is a function UNIFORM to generate random numbers, not sure if > > there is anything available for sine and cosine. > > > Your comments are appreciated. > > > Anuja > > what frequency? > what resolution? > synthesizable or testbench? > > andraka.com has a good cordic article on it among other things. > > -Jeffhas to be synthesizable. No restriction on frequency or resolution as such.
Reply by ●February 7, 20082008-02-07
On Feb 6, 10:05=A0pm, Jeff Cunningham <j...@sover.net> wrote:> FPGA wrote: > > I would like some guidline on writing a function or process to > > generate a sine wave and cosine wave. I want to include this into my > > library. Each time this function/process is called, I would like sine > > and cosines wave generated. > > > Are there any functions in VHDL which would help us do so. I know > > there is a function UNIFORM to generate random numbers, not sure if > > there is anything available for sine and cosine. > > > Your comments are appreciated. > > > Anuja > > what frequency? > what resolution? > synthesizable or testbench? > > andraka.com has a good cordic article on it among other things. > > -Jeffhas to be synthesizable. No restriction on frequency or resolution.
Reply by ●February 7, 20082008-02-07
FPGA wrote:> I would like some guidline on writing a function or process to > generate a sine wave and cosine wave. I want to include this into my > library. Each time this function/process is called, I would like sine > and cosines wave generated. > > Are there any functions in VHDL which would help us do so. I know > there is a function UNIFORM to generate random numbers, not sure if > there is anything available for sine and cosine. > > Your comments are appreciated. > > > AnujaIs this for a testbench or for sometihng that is going into hardware? If for a testbench, just use the math_real sin and cos functions, converting the resulting reals to the format you need to drive your hardware. If it is to be synthesized into hardware, the math_real library isn't going to help you much, as reals don't map directly into synthesizable hardware.
Reply by ●February 7, 20082008-02-07
On Feb 6, 11:42=A0pm, Ray Andraka <r...@andraka.com> wrote:> FPGA wrote: > > I would like some guidline on writing a function or process to > > generate a sine wave and cosine wave. I want to include this into my > > library. Each time this function/process is called, I would like sine > > and cosines wave generated. > > > Are there any functions in VHDL which would help us do so. I know > > there is a function UNIFORM to generate random numbers, not sure if > > there is anything available for sine and cosine. > > > Your comments are appreciated. > > > Is this for a testbench or for sometihng that is going into hardware? > If for a testbench, just use the math_real sin and cos functions, > converting the resulting reals to the format you need to drive your > hardware. =A0If it is to be synthesized into hardware, the math_real > library isn't going to help you much, as reals don't map directly into > synthesizable hardware.Using the math_real library can do for now. I have had a look at the sin and cos functions there. I am also aware on how to conver the real format to the format I want. I intend to generate a wave. sin and cos in math_real would just generate a value for a particular input. How can i generate a sine or cos waveform. I wish to make this function parametrized as follows (not sure if this should go into a function or process) function sin (x: signed, bw : integer) return signed is x: signed input with variable bit width bw : desired bit width of output I can convert signed to real and then use "sin" function in math_real. I am still not sure on how I would generate a wave for each call. Your comments would be appreciated
Reply by ●February 7, 20082008-02-07
You need to run a count or phase accumulation to feed into the sin/cos function. signal phase: real; constant scale: real:= 2.0**bw; for n in 0 to 10000 loop sig <= std_logic_vector(to_signed(integer(scale*sin(phase)),bw); phase <= phase + phase_increment; wait until clk='1'; end loop; FPGA wrote:> On Feb 6, 11:42 pm, Ray Andraka <r...@andraka.com> wrote: > >>FPGA wrote: >> >>>I would like some guidline on writing a function or process to >>>generate a sine wave and cosine wave. I want to include this into my >>>library. Each time this function/process is called, I would like sine >>>and cosines wave generated. >> >>>Are there any functions in VHDL which would help us do so. I know >>>there is a function UNIFORM to generate random numbers, not sure if >>>there is anything available for sine and cosine. >> >>>Your comments are appreciated. >> >> >>Is this for a testbench or for sometihng that is going into hardware? >>If for a testbench, just use the math_real sin and cos functions, >>converting the resulting reals to the format you need to drive your >>hardware. If it is to be synthesized into hardware, the math_real >>library isn't going to help you much, as reals don't map directly into >>synthesizable hardware. > > > Using the math_real library can do for now. I have had a look at the > sin and cos functions there. I am also aware on how to conver the real > format to the format I want. I intend to generate a wave. sin and cos > in math_real would just generate a value for a particular input. How > can i generate a sine or cos waveform. I wish to make this function > parametrized as follows (not sure if this should go into a function or > process) > > function sin (x: signed, bw : integer) return signed is > > x: signed input with variable bit width > bw : desired bit width of output > > I can convert signed to real and then use "sin" function in math_real. > I am still not sure on how I would generate a wave for each call. > > Your comments would be appreciated
Reply by ●February 7, 20082008-02-07
Bresenhams algorithm provides better results with far less accumulator bits compared to a phase accumulator. Also, the input parameters (M waves in N cycles) are very convenient in many cases. If the OP wants a sine, one option that avoids the sine computation is an oscillator: next_sin <= cos*k; next_cos <= sin*k; The constant k determines the frequency. Kolja Sulimma On 7 Feb., 09:00, Ray Andraka <r...@andraka.com> wrote:> You need to run a count or phase accumulation to feed into the sin/cos > function. > > signal phase: real; > constant scale: real:= 2.0**bw; > > for n in 0 to 10000 loop > sig <= std_logic_vector(to_signed(integer(scale*sin(phase)),bw); > phase <= phase + phase_increment; > wait until clk='1'; > end loop;
Reply by ●February 7, 20082008-02-07
On Feb 7, 11:00=A0am, Ray Andraka <r...@andraka.com> wrote:> You need to run a count or phase accumulation to feed into the sin/cos > function. > > signal phase: real; > constant scale: real:=3D 2.0**bw; > > for n in 0 to 10000 loop > =A0 =A0 =A0 =A0 sig <=3D std_logic_vector(to_signed(integer(scale*sin(phas=e)),bw);> =A0 =A0 =A0 =A0 phase <=3D phase + phase_increment; > =A0 =A0 =A0 =A0 wait until clk=3D'1'; > end loop; >That's good, but in math_real library sin/cos generate by Tailor formula. And type real have very small size. All of this get not good sin. These can give that noise of your system will grow.





