Reed solomon IP core

Hi all,
Looking at the Xilinx IP core documentation I found only 2 versions of
reed solomon decoder implemented on Virtex-5 (RS decoder version 6.1)
and Virtex-2pro (RS decoder version 5.1). I need to know how this IP
core will consume (LUTs, slices, Block RAM/FIFO, Frequency) if it is
implemented on virtex-4 (xc4vfx12-10ff668 or XC4vlx100-11ff668). Any
documentation will be helpful.
Thank you.

Have you tried getting an evaluation license from Xilinx?  Once you have 
that, you could build it yourself in your technology of choice...

Just remember, the evaluation product will not run for very long.  (We 
accidentally build an FPGA with it, and wondered why the decoder stopped 
working after several hours....)

JTW
"nezhate" <mazouz.nezhate@gmail.com> wrote in message 
news:6b82f5a0-3d33-43b6-9fb1-3cf10550a8c7@1g2000hsl.googlegroups.com...
> Hi all,
> Looking at the Xilinx IP core documentation I found only 2 versions of
> reed solomon decoder implemented on Virtex-5 (RS decoder version 6.1)
> and Virtex-2pro (RS decoder version 5.1). I need to know how this IP
> core will consume (LUTs, slices, Block RAM/FIFO, Frequency) if it is
> implemented on virtex-4 (xc4vfx12-10ff668 or XC4vlx100-11ff668). Any
> documentation will be helpful.
> Thank you. 

On Feb 12, 9:26 am, "jtw" <wrightjt @hotmail.invalid> wrote:
> Have you tried getting an evaluation license from Xilinx?  Once you have
> that, you could build it yourself in your technology of choice...
>
> Just remember, the evaluation product will not run for very long.  (We
> accidentally build an FPGA with it, and wondered why the decoder stopped


I didn't try to get an evaluation license from Xilinx. Thank you for
your helpful information.
Nezhate.