Survey: FPGA PCB layout

Joel Koltner wrote:
> Hi Joerg,
> 
> "Joerg" <notthisjoergsch@removethispacbell.net> wrote in message 
> news:PLsOj.7522$GE1.332@nlpi061.nbdc.sbc.com...
>> Private companies generally offer zilch in retirement benefits. Those days 
>> are long gone.
> 
> Actually I think a very significant fraction of companies (at least those 
> hiring EEs) offer some sort of contribution to 401k plans, sometimes profit 
> sharing, sometimes stock options, etc... but I concur that the old days of 
> "company pensions" is pretty much gone.
> 

Mostly it's a mere pittance. And that's ok, I am a strong believer that 
everyone should pull their own weight. Except disabled people, of course.


>> A 70 year old programmer can be better than a 40 year old.
> 
> Absolutely, but if you're an employer it's definitely a legitimate 
> consideration that starting a bunch of 70-year-olds on a, say, decade-long 
> "modernization" project is rather riskier than if you toss a few 50- or 
> 30-year-olds into the mix as well. :-)
> 

True. However, we should embrace the Japanese concept of letting older 
folks teach the young ones, not lay them off.


>> Anyhow, why should retirement checks be based on the last year of service? 
>> IMHO that's wrong.
> 
> I agree that one year seems too short, but trying to figure out how many years 
> should be taken into consideration (which is effectively what happens in 
> private companies if the company is contributing to your 401k) is not going to 
> be easy either.
> 

Just make it the same as with 401(k), IRA, old style pension funds, 
social security etc. What counts is what you pay in over your whole career.

We can read such stories almost daily, just an example from this morning:
http://www.sacbee.com/111/story/876845.html

Guess who gets to pay the tab for the agency's legal defense?

-- 
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.

"Joerg" <notthisjoergsch@removethispacbell.net> wrote in message 
news:Jr5Pj.4650$vF.1890@newssvr21.news.prodigy.net...
> Mostly it's a mere pittance. And that's ok, I am a strong believer that 
> everyone should pull their own weight.

I guess it depends on the employer...

Do you see anything bad about the old system of pensions (from private 
companies, ignore the government for the moment)?  I see them more as 
"different" than particularly better or worse.  These days you're personally 
responsible for more of your retirement planning, which has the upside that 
you can probably do a better job than some company-wide pension programs used 
to do, but the downside is that those who plan poorly (or not at all) end up 
needing that much more government assistance once they're retired.

> True. However, we should embrace the Japanese concept of letting older folks 
> teach the young ones, not lay them off.

Yes, agreed 100%.

> Just make it the same as with 401(k), IRA, old style pension funds, social 
> security etc. What counts is what you pay in over your whole career.

The end result there is that if your employer requires you to move to, e.g., 
California for the last few years of employment you'll pretty much be forced 
to then immediately move when you hit retirement.  I suppose that isn't 
particularly awful, since that fact would have been clear when the employer 
said, "move!"

> Guess who gets to pay the tab for the agency's legal defense?

Sheesh... screw the taxpyers with retiremend funding and then screw'em again 
when someone tries to blow the whistle.  Nice...

---Joel

On Mon, 21 Apr 2008 10:04:21 -0700, "Joel Koltner"
<zapwireDASHgroups@yahoo.com> wrote:

>"John Larkin" <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote in message 
>news:coen041brmqf342022figkpv9ogjol2h0i@4ax.com...
>> Easier to inspect, too,
>> since you can't inspect them at all.
>
>I'm sure you know this, but plenty of places will X-ray BGAs to "inspect" 
>them.
>

Yes, but that's expensive and it's not usually done on a production
basis. We do have a video prism thing the lets us peek under the chip,
with fair visibility three or maybe four balls in. But we don't
routinely use it. The BGAs just work.

John

In article <NX0Pj.1534$26.605@newssvr23.news.prodigy.net>, 
notthisjoergsch@removethispacbell.net says...
> krw wrote:
> > In article <6PQOj.21063$%41.8783@nlpi064.nbdc.sbc.com>, 
> > notthisjoergsch@removethispacbell.net says...
> >> John Larkin wrote:
> >>> On Sun, 20 Apr 2008 14:13:21 -0700, Joerg
> >>> <notthisjoergsch@removethispacbell.net> wrote:
> >>>
> >>>> John Larkin wrote:
> >>>>> On Sat, 19 Apr 2008 14:17:44 -0700, Joerg
> >>>>> <notthisjoergsch@removethispacbell.net> wrote:
> >>>>>
> >>>>>> Nico Coesel wrote:
> >>>>>>> Dave <dhschetz@gmail.com> wrote:
> >>>>>>>
> >>>>>>>> Does anybody out there have a good methodology for determining your
> >>>>>>>> optimal FPGA pinouts, for making PCB layouts nice, pretty, and clean?
> >>>>>>>> The brute force method is fairly maddening. I'd be curious to hear if
> >>>>>>>> anybody has any 'tricks of the trade' here.
> >>>>>>> I start thinking about how the PCB should be routed the minute I start
> >>>>>>> to draw a schematic. I always draw components with their actual
> >>>>>>> pin-outs. This helps to group pins together and it helps to
> >>>>>>> troubleshoot the circuit when the prototype is on your bench (no need
> >>>>>>> to lookup the pinouts because they are in your diagram).
> >>>>>>>
> >>>>>> For quad opamps like the LM324 as well? That can make a schematic harder 
> >>>>>> to read and will also cause a nightmare if the layouter wants to swap 
> >>>>>> amp A with amp C and stuff like that.
> >>>>>>
> >>>>>> [...]
> >>>>> A quad opamp doesn't have 1738 pins!
> >>>>>
> >>>> Well, yes, I was just wondering about whether Nico really always draws 
> >>>> the physical package. Looks like he doesn't for smaller stuff.
> >>>>
> >>>> With 1738 pins you can only hope that the FPGA has enough routing 
> >>>> resources. That used to be a major pain in the early 90's. Don't know 
> >>>> about nowadays since other guys design the parts with the big FPGAs. And 
> >>>> I am glad I don't have to deal with BGA, at least not with large ones ...
> >>> The biggest ones we use are Sparten 3's with 456 balls on 1 mm
> >>> centers. We haven't had any routing problems so far, doing pretty
> >>> complex stuff at 128 MHz clock rates. Our in-house BGA soldering
> >>> yield, to date, is exactly 100%. BGAs seem to be a lot easier to
> >>> solder reliably than fine-pitch leaded parts. Easier to inspect, too,
> >>> since you can't inspect them at all.
> >>>
> >> The latter is a concern in my field (medical). We need to be able to 
> >> inspect. The other concern is involuntary board flexing. Most of my 
> >> designs have to sustain under tortures such as freighter pilots 
> >> ploughing through a storm in the Carribean in airplanes as old as a DC-3 
> >> or a trucker in Africa who is lead-footing it over a few hundred miles 
> >> of washboard road.
> >>
> > X-Rays?
> > 
> 
> They tend not to penetrate through metal so well and are frowned upon at 
> the work place.

But that's how it's done.

-- 
Keith

In article <dj0q04d5je4tjvlvd8if4ng2dka9159if4@4ax.com>, 
jjlarkin@highNOTlandTHIStechnologyPART.com says...
> On Mon, 21 Apr 2008 10:04:21 -0700, "Joel Koltner"
> <zapwireDASHgroups@yahoo.com> wrote:
> 
> >"John Larkin" <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote in message 
> >news:coen041brmqf342022figkpv9ogjol2h0i@4ax.com...
> >> Easier to inspect, too,
> >> since you can't inspect them at all.
> >
> >I'm sure you know this, but plenty of places will X-ray BGAs to "inspect" 
> >them.
> >
> 
> Yes, but that's expensive and it's not usually done on a production
> basis. We do have a video prism thing the lets us peek under the chip,
> with fair visibility three or maybe four balls in. But we don't
> routinely use it. The BGAs just work.

Right.  Flip-chip mounting of chips to substrates has been done for 
at least forty years.  It just works. 

-- 
Keith

krw wrote:
> In article <NX0Pj.1534$26.605@newssvr23.news.prodigy.net>, 
> notthisjoergsch@removethispacbell.net says...
>> krw wrote:
>>> In article <6PQOj.21063$%41.8783@nlpi064.nbdc.sbc.com>, 
>>> notthisjoergsch@removethispacbell.net says...
>>>> John Larkin wrote:
>>>>> On Sun, 20 Apr 2008 14:13:21 -0700, Joerg
>>>>> <notthisjoergsch@removethispacbell.net> wrote:
>>>>>
>>>>>> John Larkin wrote:
>>>>>>> On Sat, 19 Apr 2008 14:17:44 -0700, Joerg
>>>>>>> <notthisjoergsch@removethispacbell.net> wrote:
>>>>>>>
>>>>>>>> Nico Coesel wrote:
>>>>>>>>> Dave <dhschetz@gmail.com> wrote:
>>>>>>>>>
>>>>>>>>>> Does anybody out there have a good methodology for determining your
>>>>>>>>>> optimal FPGA pinouts, for making PCB layouts nice, pretty, and clean?
>>>>>>>>>> The brute force method is fairly maddening. I'd be curious to hear if
>>>>>>>>>> anybody has any 'tricks of the trade' here.
>>>>>>>>> I start thinking about how the PCB should be routed the minute I start
>>>>>>>>> to draw a schematic. I always draw components with their actual
>>>>>>>>> pin-outs. This helps to group pins together and it helps to
>>>>>>>>> troubleshoot the circuit when the prototype is on your bench (no need
>>>>>>>>> to lookup the pinouts because they are in your diagram).
>>>>>>>>>
>>>>>>>> For quad opamps like the LM324 as well? That can make a schematic harder 
>>>>>>>> to read and will also cause a nightmare if the layouter wants to swap 
>>>>>>>> amp A with amp C and stuff like that.
>>>>>>>>
>>>>>>>> [...]
>>>>>>> A quad opamp doesn't have 1738 pins!
>>>>>>>
>>>>>> Well, yes, I was just wondering about whether Nico really always draws 
>>>>>> the physical package. Looks like he doesn't for smaller stuff.
>>>>>>
>>>>>> With 1738 pins you can only hope that the FPGA has enough routing 
>>>>>> resources. That used to be a major pain in the early 90's. Don't know 
>>>>>> about nowadays since other guys design the parts with the big FPGAs. And 
>>>>>> I am glad I don't have to deal with BGA, at least not with large ones ...
>>>>> The biggest ones we use are Sparten 3's with 456 balls on 1 mm
>>>>> centers. We haven't had any routing problems so far, doing pretty
>>>>> complex stuff at 128 MHz clock rates. Our in-house BGA soldering
>>>>> yield, to date, is exactly 100%. BGAs seem to be a lot easier to
>>>>> solder reliably than fine-pitch leaded parts. Easier to inspect, too,
>>>>> since you can't inspect them at all.
>>>>>
>>>> The latter is a concern in my field (medical). We need to be able to 
>>>> inspect. The other concern is involuntary board flexing. Most of my 
>>>> designs have to sustain under tortures such as freighter pilots 
>>>> ploughing through a storm in the Carribean in airplanes as old as a DC-3 
>>>> or a trucker in Africa who is lead-footing it over a few hundred miles 
>>>> of washboard road.
>>>>
>>> X-Rays?
>>>
>> They tend not to penetrate through metal so well and are frowned upon at 
>> the work place.
> 
> But that's how it's done.
> 

Well, what else can they do? And I guess OSHA is going to be breathing 
down their backs all the time. I like to see things so I prefer QFP. of 
course you won't get 1700 pins that way but usually that's not realy needed.

-- 
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.

krw wrote:
> In article <dj0q04d5je4tjvlvd8if4ng2dka9159if4@4ax.com>, 
> jjlarkin@highNOTlandTHIStechnologyPART.com says...
>> On Mon, 21 Apr 2008 10:04:21 -0700, "Joel Koltner"
>> <zapwireDASHgroups@yahoo.com> wrote:
>>
>>> "John Larkin" <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote in message 
>>> news:coen041brmqf342022figkpv9ogjol2h0i@4ax.com...
>>>> Easier to inspect, too,
>>>> since you can't inspect them at all.
>>> I'm sure you know this, but plenty of places will X-ray BGAs to "inspect" 
>>> them.
>>>
>> Yes, but that's expensive and it's not usually done on a production
>> basis. We do have a video prism thing the lets us peek under the chip,
>> with fair visibility three or maybe four balls in. But we don't
>> routinely use it. The BGAs just work.
> 
> Right.  Flip-chip mounting of chips to substrates has been done for 
> at least forty years.  It just works. 
> 

Yes, and I've done my fair share as well. But: It was either to a hard 
substrate that does not flex such as alumina or to a very flexible 
material such as Kapton. FR4 ain't my kind of turf with BGA. Can be ok 
for gear that doesn't get stressed much but not in my field of work.

-- 
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.

In article <5HaPj.9139$V14.611@nlpi070.nbdc.sbc.com>, 
notthisjoergsch@removethispacbell.net says...
> krw wrote:
> > In article <NX0Pj.1534$26.605@newssvr23.news.prodigy.net>, 
> > notthisjoergsch@removethispacbell.net says...
> >> krw wrote:
> >>> In article <6PQOj.21063$%41.8783@nlpi064.nbdc.sbc.com>, 
> >>> notthisjoergsch@removethispacbell.net says...
> >>>> John Larkin wrote:
> >>>>> On Sun, 20 Apr 2008 14:13:21 -0700, Joerg
> >>>>> <notthisjoergsch@removethispacbell.net> wrote:
> >>>>>
> >>>>>> John Larkin wrote:
> >>>>>>> On Sat, 19 Apr 2008 14:17:44 -0700, Joerg
> >>>>>>> <notthisjoergsch@removethispacbell.net> wrote:
> >>>>>>>
> >>>>>>>> Nico Coesel wrote:
> >>>>>>>>> Dave <dhschetz@gmail.com> wrote:
> >>>>>>>>>
> >>>>>>>>>> Does anybody out there have a good methodology for determining your
> >>>>>>>>>> optimal FPGA pinouts, for making PCB layouts nice, pretty, and clean?
> >>>>>>>>>> The brute force method is fairly maddening. I'd be curious to hear if
> >>>>>>>>>> anybody has any 'tricks of the trade' here.
> >>>>>>>>> I start thinking about how the PCB should be routed the minute I start
> >>>>>>>>> to draw a schematic. I always draw components with their actual
> >>>>>>>>> pin-outs. This helps to group pins together and it helps to
> >>>>>>>>> troubleshoot the circuit when the prototype is on your bench (no need
> >>>>>>>>> to lookup the pinouts because they are in your diagram).
> >>>>>>>>>
> >>>>>>>> For quad opamps like the LM324 as well? That can make a schematic harder 
> >>>>>>>> to read and will also cause a nightmare if the layouter wants to swap 
> >>>>>>>> amp A with amp C and stuff like that.
> >>>>>>>>
> >>>>>>>> [...]
> >>>>>>> A quad opamp doesn't have 1738 pins!
> >>>>>>>
> >>>>>> Well, yes, I was just wondering about whether Nico really always draws 
> >>>>>> the physical package. Looks like he doesn't for smaller stuff.
> >>>>>>
> >>>>>> With 1738 pins you can only hope that the FPGA has enough routing 
> >>>>>> resources. That used to be a major pain in the early 90's. Don't know 
> >>>>>> about nowadays since other guys design the parts with the big FPGAs. And 
> >>>>>> I am glad I don't have to deal with BGA, at least not with large ones ...
> >>>>> The biggest ones we use are Sparten 3's with 456 balls on 1 mm
> >>>>> centers. We haven't had any routing problems so far, doing pretty
> >>>>> complex stuff at 128 MHz clock rates. Our in-house BGA soldering
> >>>>> yield, to date, is exactly 100%. BGAs seem to be a lot easier to
> >>>>> solder reliably than fine-pitch leaded parts. Easier to inspect, too,
> >>>>> since you can't inspect them at all.
> >>>>>
> >>>> The latter is a concern in my field (medical). We need to be able to 
> >>>> inspect. The other concern is involuntary board flexing. Most of my 
> >>>> designs have to sustain under tortures such as freighter pilots 
> >>>> ploughing through a storm in the Carribean in airplanes as old as a DC-3 
> >>>> or a trucker in Africa who is lead-footing it over a few hundred miles 
> >>>> of washboard road.
> >>>>
> >>> X-Rays?
> >>>
> >> They tend not to penetrate through metal so well and are frowned upon at 
> >> the work place.
> > 
> > But that's how it's done.
> > 
> 
> Well, what else can they do? And I guess OSHA is going to be breathing 
> down their backs all the time. I like to see things so I prefer QFP. of 
> course you won't get 1700 pins that way but usually that's not realy needed.

Your "usually" and mine are quite different.  ;-)

-- 
Keith

In article <DJaPj.9140$V14.3026@nlpi070.nbdc.sbc.com>, 
notthisjoergsch@removethispacbell.net says...
> krw wrote:
> > In article <dj0q04d5je4tjvlvd8if4ng2dka9159if4@4ax.com>, 
> > jjlarkin@highNOTlandTHIStechnologyPART.com says...
> >> On Mon, 21 Apr 2008 10:04:21 -0700, "Joel Koltner"
> >> <zapwireDASHgroups@yahoo.com> wrote:
> >>
> >>> "John Larkin" <jjlarkin@highNOTlandTHIStechnologyPART.com> wrote in message 
> >>> news:coen041brmqf342022figkpv9ogjol2h0i@4ax.com...
> >>>> Easier to inspect, too,
> >>>> since you can't inspect them at all.
> >>> I'm sure you know this, but plenty of places will X-ray BGAs to "inspect" 
> >>> them.
> >>>
> >> Yes, but that's expensive and it's not usually done on a production
> >> basis. We do have a video prism thing the lets us peek under the chip,
> >> with fair visibility three or maybe four balls in. But we don't
> >> routinely use it. The BGAs just work.
> > 
> > Right.  Flip-chip mounting of chips to substrates has been done for 
> > at least forty years.  It just works. 
> > 
> 
> Yes, and I've done my fair share as well. But: It was either to a hard 
> substrate that does not flex such as alumina or to a very flexible 
> material such as Kapton. FR4 ain't my kind of turf with BGA. Can be ok 
> for gear that doesn't get stressed much but not in my field of work.

They've been flip-chip mounting on organic substrates for at least a 
decade, too. 

-- 
Keith

On Thu, 17 Apr 2008 17:13:27 -0400, "Steve" <sjburke1@comcast.net>
wrote:

>
>"Joerg" <notthisjoergsch@removethispacbell.net> wrote in message 
>news:U5MNj.6956$GE1.6193@nlpi061.nbdc.sbc.com...
>> qrk wrote:
>>> On Thu, 17 Apr 2008 09:43:09 -0700 (PDT), Dave <dhschetz@gmail.com>
>>> wrote:
>>>
>>>> Does anybody out there have a good methodology for determining your
>>>> optimal FPGA pinouts, for making PCB layouts nice, pretty, and clean?
>>>> The brute force method is fairly maddening. I'd be curious to hear if
>>>> anybody has any 'tricks of the trade' here.
>>>>
>>>> Also, just out of curiosity, how many of you do your own PCB layout,
>>>> versus farming it out? It would certainly save us a lot of money to
>>>> buy the tools and do it ourselves, but it seems like laying out a
>>>> board out well requires quite a bit of experience, especially a 6-8
>>>> layer board with high pin count FPGA's.
>>>>
>>>> We're just setting up a hardware shop here, and although I've been
>>>> doing FPGA and board schematics design for a while, it's always been
>>>> at a larger company with resources to farm the layout out, and we
>>>> never did anything high-speed to really worry about the board layout
>>>> too much. Thanks in advance for your opinions.
>>>>
>>>> Dave
>>>
>>> Sure wish there was a slick way of doing FPGA pinouts. I usually use
>>> graph paper and figure out the FPGA pinout to other parts to minimize
>>> routing snarls.
>>>
>>> I do pcb layouts on my own and other folks designs. Our boards have
>>> high-speed routing, switching power supplies, and high-gain analog
>>> stuff; sometimes all on the same board. Unless the service bureau has
>>> someone who understands how to lay out such circuitry and place
>>> sensitive analog stuff near digital junk, it is more trouble to farm
>>> out than do it yourself if you want the board to work on the first
>>> cut.
>>>
>>
>> Or find a good layouter and develop a long-term business relationship. My 
>> layouter knows just from looking at a schematic which areas are critical. 
>> He's a lot older than I am and that is probably one of the reasons why his 
>> stuff works without much assistance from me. Nothing can replace a few 
>> decades of experience.
>>
>>
>>> Doing your own layout will take a lot of learning to master the PCB
>>> layout program and what your board vendor can handle. It will take 5
>>> to 10 complicated boards to become mildly proficient at layout. I
>>> don't know about saving cost. Your time may be better spent doing
>>> other activities rather than learning about layout and doing the
>>> layouts. ...
>>
>>
>> Yep, that's why I usually do not do my own layouts. Occassionally I route 
>> a small portion of a circuit and send that to my layouter. No DRC or 
>> anything, just to show him how I'd like it done.
>>
>>
>>>     ... The upside to doing your own layout - you control the whole
>>> design from start to finish. If you have a challenging layout, you'll
>>> have a much higher probability of having a working board on the first
>>> try which has hidden savings (getting to market earlier <- less
>>> troubleshooting + less respins).
>>>
>>> ---
>>> Mark
>>
>>
>> -- 
>> Regards, Joerg
>>
>> http://www.analogconsultants.com/
>>
>> "gmail" domain blocked because of excessive spam.
>> Use another domain or send PM.
>
>I agree with Joerg. Good high speed or mixed signal PCB layout is a career 
>choice, and we electrical engineers already chose our career. A good layout 
>requires someone who understands not just the software package, but the 
>details of how the manufacturing operation is going to proceed, what the 
>limits of the processes are, what the assembly operations require of the 
>board, and is anal about things like footprint libraries and solder mask 
>clearances and a thousand other details that I'm only partially aware of. 
>The more complex your design, the more critical these things become.
>
>I have two good local outfits for farming out boards. For complex stuff, 
>they know I'll come to their place and sit next to the designer for a good 
>bit of the initial placement. While we are doing placement, we are also 
>discussing critical nets, routing paths, layer usage, etc.  That gives us 
>direct face to face communication and avoids spending lots of time trying to 
>write/draw everything in gory detail (which gets ignored or misunderstood a 
>lot of the time). That investment pays big dividends in schedule and board 
>performance.
>
>Don't be fooled by the relatively low cost of the software. That's not where 
>the big costs are.
>
>I once laid off my entire PCB layout department and sent all the work 
>outside, because although my employees all knew how to use the software, 
>none of them could tell me what their completion date would be, or how many 
>hours it would take, and they certainly weren't interested in meeting 
>schedules. The outside sources would commit to a cost and a delivery date. 
>And we already knew they could meet our performance objectives. Fixed price 
>contracts are great motivators. Missing an engineering test window, or 
>slipping a production schedule because of a layout delay can be enormously 
>expensive.
>
>Of course, if I had let my engineers do their own layouts, the motivation 
>would have been present, but the technical proficiency would not. How 
>proficient can anyone become if they only do layout a few times a year? 
>Also, on many projects engineers use the layout period for other important 
>things like documentation, test procedures, writing test code, etc. Doing 
>your own layout serializes these tasks and will stretch your schedule.
>
>So my advice is to keep doing what you have been doing. Its far more likely 
>that its the cheapest approach, even though you occasionally have to write a 
>big check.
>
>Steve
>

Pretty much honest responses.  Almost all of good value. 

 Mark hinted and Joerg mentioned one of the foremost subjects,
floorplanning.  This will impact everything you do.  From the original
schematic drawing to the FPGA  VHDL/Verilog coding and optimizing to
PWB layout , documentation, and testing.  Each of these activities
requires floorplanning to get good results.  To achieve the best PWD
layout results make several different versions for your first few
boards and route them all to completion.  It will make huge
improvements in your understanding.