On Fri, 18 Apr 2008 00:09:02 -0700 (PDT), "David L. Jones" <altzone@gmail.com> wrote:>On Apr 18, 8:15 am, Dave <dhsch...@gmail.com> wrote: >> On Apr 17, 5:13 pm, "Steve" <sjbur...@comcast.net> wrote: >> >> >> >> > "Joerg" <notthisjoerg...@removethispacbell.net> wrote in message >> >> >news:U5MNj.6956$GE1.6193@nlpi061.nbdc.sbc.com... >> >> > > qrk wrote: >> > >> On Thu, 17 Apr 2008 09:43:09 -0700 (PDT), Dave <dhsch...@gmail.com> >> > >> wrote: >> >> > >>> Does anybody out there have a good methodology for determining your >> > >>> optimal FPGA pinouts, for making PCB layouts nice, pretty, and clean? >> > >>> The brute force method is fairly maddening. I'd be curious to hear if >> > >>> anybody has any 'tricks of the trade' here. >> >> > >>> Also, just out of curiosity, how many of you do your own PCB layout, >> > >>> versus farming it out? It would certainly save us a lot of money to >> > >>> buy the tools and do it ourselves, but it seems like laying out a >> > >>> board out well requires quite a bit of experience, especially a 6-8 >> > >>> layer board with high pin count FPGA's. >> >> > >>> We're just setting up a hardware shop here, and although I've been >> > >>> doing FPGA and board schematics design for a while, it's always been >> > >>> at a larger company with resources to farm the layout out, and we >> > >>> never did anything high-speed to really worry about the board layout >> > >>> too much. Thanks in advance for your opinions. >> >> > >>> Dave >> >> > >> Sure wish there was a slick way of doing FPGA pinouts. I usually use >> > >> graph paper and figure out the FPGA pinout to other parts to minimize >> > >> routing snarls. >> >> > >> I do pcb layouts on my own and other folks designs. Our boards have >> > >> high-speed routing, switching power supplies, and high-gain analog >> > >> stuff; sometimes all on the same board. Unless the service bureau has >> > >> someone who understands how to lay out such circuitry and place >> > >> sensitive analog stuff near digital junk, it is more trouble to farm >> > >> out than do it yourself if you want the board to work on the first >> > >> cut. >> >> > > Or find a good layouter and develop a long-term business relationship. My >> > > layouter knows just from looking at a schematic which areas are critical. >> > > He's a lot older than I am and that is probably one of the reasons why his >> > > stuff works without much assistance from me. Nothing can replace a few >> > > decades of experience. >> >> > >> Doing your own layout will take a lot of learning to master the PCB >> > >> layout program and what your board vendor can handle. It will take 5 >> > >> to 10 complicated boards to become mildly proficient at layout. I >> > >> don't know about saving cost. Your time may be better spent doing >> > >> other activities rather than learning about layout and doing the >> > >> layouts. ... >> >> > > Yep, that's why I usually do not do my own layouts. Occassionally I route >> > > a small portion of a circuit and send that to my layouter. No DRC or >> > > anything, just to show him how I'd like it done. >> >> > >> ... The upside to doing your own layout - you control the whole >> > >> design from start to finish. If you have a challenging layout, you'll >> > >> have a much higher probability of having a working board on the first >> > >> try which has hidden savings (getting to market earlier <- less >> > >> troubleshooting + less respins). >> >> > >> --- >> > >> Mark >> >> > > -- >> > > Regards, Joerg >> >> > >http://www.analogconsultants.com/ >> >> > > "gmail" domain blocked because of excessive spam. >> > > Use another domain or send PM. >> >> > I agree with Joerg. Good high speed or mixed signal PCB layout is a career >> > choice, and we electrical engineers already chose our career. A good layout >> > requires someone who understands not just the software package, but the >> > details of how the manufacturing operation is going to proceed, what the >> > limits of the processes are, what the assembly operations require of the >> > board, and is anal about things like footprint libraries and solder mask >> > clearances and a thousand other details that I'm only partially aware of. >> > The more complex your design, the more critical these things become. >> >> > I have two good local outfits for farming out boards. For complex stuff, >> > they know I'll come to their place and sit next to the designer for a good >> > bit of the initial placement. While we are doing placement, we are also >> > discussing critical nets, routing paths, layer usage, etc. That gives us >> > direct face to face communication and avoids spending lots of time trying to >> > write/draw everything in gory detail (which gets ignored or misunderstood a >> > lot of the time). That investment pays big dividends in schedule and board >> > performance. >> >> > Don't be fooled by the relatively low cost of the software. That's not where >> > the big costs are. >> >> > I once laid off my entire PCB layout department and sent all the work >> > outside, because although my employees all knew how to use the software, >> > none of them could tell me what their completion date would be, or how many >> > hours it would take, and they certainly weren't interested in meeting >> > schedules. The outside sources would commit to a cost and a delivery date. >> > And we already knew they could meet our performance objectives. Fixed price >> > contracts are great motivators. Missing an engineering test window, or >> > slipping a production schedule because of a layout delay can be enormously >> > expensive. >> >> > Of course, if I had let my engineers do their own layouts, the motivation >> > would have been present, but the technical proficiency would not. How >> > proficient can anyone become if they only do layout a few times a year? >> > Also, on many projects engineers use the layout period for other important >> > things like documentation, test procedures, writing test code, etc. Doing >> > your own layout serializes these tasks and will stretch your schedule. >> >> > So my advice is to keep doing what you have been doing. Its far more likely >> > that its the cheapest approach, even though you occasionally have to write a >> > big check. >> >> > Steve >> >> I tend to agree with the 'farm-it-out' crowd. Unfortunately, my >> current employer doesn't want to work with my previous layout people, >> so I've been trying to search for a new partner. I've found plenty of >> board fab and assembly places, but not so much on the layout. It made >> me think that the rest of the world did their own layout. The opinions >> look pretty split from the replies here, maybe it comes down to how >> many times you do a layout each year, and how much you enjoy that sort >> of work. I definitely think it's something you have to do fairly often >> to keep your chops up. >> >> Andy, I'd also like to hear more about your pin-swap FPGA design flow >> - what tools do that? Also curious about any timing issues that have >> been caught after the pin-swap. > >In Altium Designer I use the incredibly useful "subnet jumper" feature >for BGA's. >The procedure goes something like this: >1) Fan out all the required FPGA pins first (automatically or >manually) to just outside the chip boundry. (leave several diagonal >entry paths for core and other power flood fills to get in) >2) Fully route all non-pin-swappable pins and other critical lines. >3) Ensure any other parts placements are near any required FPGA pins >or block features you think you might need. >4) Route every track just short of the fanout tracks >5) Hit the "add subnet jumper" feature and it finishes the tracks and >does all the pin swaps for you and updates the schematic. > >Probably needs a picture or two to explain it best though... > >The great part about subnet jumpers is if there are timing or other >problems you can just remove the subnet jumpers and add/edit tracks >and pins as needed and then replace the subnet jumpers. Only takes a >minute or two. > >Dave.That does sound specific to one particular tool (vendors's software).
Survey: FPGA PCB layout
Started by ●April 17, 2008
Reply by ●April 25, 20082008-04-25
Reply by ●April 25, 20082008-04-25
"JosephKK" <quiettechblue@yahoo.com> wrote in message news:o20314pl6k3565m260fkarco8n63bpb5hb@4ax.com...> That does sound specific to one particular tool (vendors's software).Yeah, after Dave posted that I checked and unfortunately Pulsonix can't do it... although it's "close enough" that I imagine adding it as a feature wouldn't be particularly difficult. I think it's a good idea -- hopefully it will show up in more tools over time.
Reply by ●April 25, 20082008-04-25
JosephKK wrote:> On Thu, 17 Apr 2008 17:13:27 -0400, "Steve" <sjburke1@comcast.net> > wrote: > >> "Joerg" <notthisjoergsch@removethispacbell.net> wrote in message >> news:U5MNj.6956$GE1.6193@nlpi061.nbdc.sbc.com... >>> qrk wrote: >>>> On Thu, 17 Apr 2008 09:43:09 -0700 (PDT), Dave <dhschetz@gmail.com> >>>> wrote: >>>> >>>>> Does anybody out there have a good methodology for determining your >>>>> optimal FPGA pinouts, for making PCB layouts nice, pretty, and clean? >>>>> The brute force method is fairly maddening. I'd be curious to hear if >>>>> anybody has any 'tricks of the trade' here. >>>>> >>>>> Also, just out of curiosity, how many of you do your own PCB layout, >>>>> versus farming it out? It would certainly save us a lot of money to >>>>> buy the tools and do it ourselves, but it seems like laying out a >>>>> board out well requires quite a bit of experience, especially a 6-8 >>>>> layer board with high pin count FPGA's. >>>>> >>>>> We're just setting up a hardware shop here, and although I've been >>>>> doing FPGA and board schematics design for a while, it's always been >>>>> at a larger company with resources to farm the layout out, and we >>>>> never did anything high-speed to really worry about the board layout >>>>> too much. Thanks in advance for your opinions. >>>>> >>>>> Dave >>>> Sure wish there was a slick way of doing FPGA pinouts. I usually use >>>> graph paper and figure out the FPGA pinout to other parts to minimize >>>> routing snarls. >>>> >>>> I do pcb layouts on my own and other folks designs. Our boards have >>>> high-speed routing, switching power supplies, and high-gain analog >>>> stuff; sometimes all on the same board. Unless the service bureau has >>>> someone who understands how to lay out such circuitry and place >>>> sensitive analog stuff near digital junk, it is more trouble to farm >>>> out than do it yourself if you want the board to work on the first >>>> cut. >>>> >>> Or find a good layouter and develop a long-term business relationship. My >>> layouter knows just from looking at a schematic which areas are critical. >>> He's a lot older than I am and that is probably one of the reasons why his >>> stuff works without much assistance from me. Nothing can replace a few >>> decades of experience. >>> >>> >>>> Doing your own layout will take a lot of learning to master the PCB >>>> layout program and what your board vendor can handle. It will take 5 >>>> to 10 complicated boards to become mildly proficient at layout. I >>>> don't know about saving cost. Your time may be better spent doing >>>> other activities rather than learning about layout and doing the >>>> layouts. ... >>> >>> Yep, that's why I usually do not do my own layouts. Occassionally I route >>> a small portion of a circuit and send that to my layouter. No DRC or >>> anything, just to show him how I'd like it done. >>> >>> >>>> ... The upside to doing your own layout - you control the whole >>>> design from start to finish. If you have a challenging layout, you'll >>>> have a much higher probability of having a working board on the first >>>> try which has hidden savings (getting to market earlier <- less >>>> troubleshooting + less respins). >>>> >>>> --- >>>> Mark >>> >>> -- >>> Regards, Joerg >>> >>> http://www.analogconsultants.com/ >>> >>> "gmail" domain blocked because of excessive spam. >>> Use another domain or send PM. >> I agree with Joerg. Good high speed or mixed signal PCB layout is a career >> choice, and we electrical engineers already chose our career. A good layout >> requires someone who understands not just the software package, but the >> details of how the manufacturing operation is going to proceed, what the >> limits of the processes are, what the assembly operations require of the >> board, and is anal about things like footprint libraries and solder mask >> clearances and a thousand other details that I'm only partially aware of. >> The more complex your design, the more critical these things become. >> >> I have two good local outfits for farming out boards. For complex stuff, >> they know I'll come to their place and sit next to the designer for a good >> bit of the initial placement. While we are doing placement, we are also >> discussing critical nets, routing paths, layer usage, etc. That gives us >> direct face to face communication and avoids spending lots of time trying to >> write/draw everything in gory detail (which gets ignored or misunderstood a >> lot of the time). That investment pays big dividends in schedule and board >> performance. >> >> Don't be fooled by the relatively low cost of the software. That's not where >> the big costs are. >> >> I once laid off my entire PCB layout department and sent all the work >> outside, because although my employees all knew how to use the software, >> none of them could tell me what their completion date would be, or how many >> hours it would take, and they certainly weren't interested in meeting >> schedules. The outside sources would commit to a cost and a delivery date. >> And we already knew they could meet our performance objectives. Fixed price >> contracts are great motivators. Missing an engineering test window, or >> slipping a production schedule because of a layout delay can be enormously >> expensive. >> >> Of course, if I had let my engineers do their own layouts, the motivation >> would have been present, but the technical proficiency would not. How >> proficient can anyone become if they only do layout a few times a year? >> Also, on many projects engineers use the layout period for other important >> things like documentation, test procedures, writing test code, etc. Doing >> your own layout serializes these tasks and will stretch your schedule. >> >> So my advice is to keep doing what you have been doing. Its far more likely >> that its the cheapest approach, even though you occasionally have to write a >> big check. >> >> Steve >> > > Pretty much honest responses. Almost all of good value. > > Mark hinted and Joerg mentioned one of the foremost subjects, > floorplanning. This will impact everything you do. From the original > schematic drawing to the FPGA VHDL/Verilog coding and optimizing to > PWB layout , documentation, and testing. Each of these activities > requires floorplanning to get good results. To achieve the best PWD > layout results make several different versions for your first few > boards and route them all to completion. It will make huge > improvements in your understanding. >Right. The same goes for code, especially micro controllers. Without spending a lot of time on a floor plan chances are it won't fit in or it'll become a hodge-podge of code snippets somehow stitched together. Seen a lot of that :-( There seems to be a huge software company up north that has in part lost the art of good floorplanning ... -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
Reply by ●April 25, 20082008-04-25
On Apr 25, 4:56 pm, JosephKK <quiettechb...@yahoo.com> wrote:> On Fri, 18 Apr 2008 00:09:02 -0700 (PDT), "David L. Jones" > > > > <altz...@gmail.com> wrote: > >On Apr 18, 8:15 am, Dave <dhsch...@gmail.com> wrote: > >> On Apr 17, 5:13 pm, "Steve" <sjbur...@comcast.net> wrote: > > >> > "Joerg" <notthisjoerg...@removethispacbell.net> wrote in message > > >> >news:U5MNj.6956$GE1.6193@nlpi061.nbdc.sbc.com... > > >> > > qrk wrote: > >> > >> On Thu, 17 Apr 2008 09:43:09 -0700 (PDT), Dave <dhsch...@gmail.com> > >> > >> wrote: > > >> > >>> Does anybody out there have a good methodology for determining your > >> > >>> optimal FPGA pinouts, for making PCB layouts nice, pretty, and clean? > >> > >>> The brute force method is fairly maddening. I'd be curious to hear if > >> > >>> anybody has any 'tricks of the trade' here. > > >> > >>> Also, just out of curiosity, how many of you do your own PCB layout, > >> > >>> versus farming it out? It would certainly save us a lot of money to > >> > >>> buy the tools and do it ourselves, but it seems like laying out a > >> > >>> board out well requires quite a bit of experience, especially a 6-8 > >> > >>> layer board with high pin count FPGA's. > > >> > >>> We're just setting up a hardware shop here, and although I've been > >> > >>> doing FPGA and board schematics design for a while, it's always been > >> > >>> at a larger company with resources to farm the layout out, and we > >> > >>> never did anything high-speed to really worry about the board layout > >> > >>> too much. Thanks in advance for your opinions. > > >> > >>> Dave > > >> > >> Sure wish there was a slick way of doing FPGA pinouts. I usually use > >> > >> graph paper and figure out the FPGA pinout to other parts to minimize > >> > >> routing snarls. > > >> > >> I do pcb layouts on my own and other folks designs. Our boards have > >> > >> high-speed routing, switching power supplies, and high-gain analog > >> > >> stuff; sometimes all on the same board. Unless the service bureau has > >> > >> someone who understands how to lay out such circuitry and place > >> > >> sensitive analog stuff near digital junk, it is more trouble to farm > >> > >> out than do it yourself if you want the board to work on the first > >> > >> cut. > > >> > > Or find a good layouter and develop a long-term business relationship. My > >> > > layouter knows just from looking at a schematic which areas are critical. > >> > > He's a lot older than I am and that is probably one of the reasons why his > >> > > stuff works without much assistance from me. Nothing can replace a few > >> > > decades of experience. > > >> > >> Doing your own layout will take a lot of learning to master the PCB > >> > >> layout program and what your board vendor can handle. It will take 5 > >> > >> to 10 complicated boards to become mildly proficient at layout. I > >> > >> don't know about saving cost. Your time may be better spent doing > >> > >> other activities rather than learning about layout and doing the > >> > >> layouts. ... > > >> > > Yep, that's why I usually do not do my own layouts. Occassionally I route > >> > > a small portion of a circuit and send that to my layouter. No DRC or > >> > > anything, just to show him how I'd like it done. > > >> > >> ... The upside to doing your own layout - you control the whole > >> > >> design from start to finish. If you have a challenging layout, you'll > >> > >> have a much higher probability of having a working board on the first > >> > >> try which has hidden savings (getting to market earlier <- less > >> > >> troubleshooting + less respins). > > >> > >> --- > >> > >> Mark > > >> > > -- > >> > > Regards, Joerg > > >> > >http://www.analogconsultants.com/ > > >> > > "gmail" domain blocked because of excessive spam. > >> > > Use another domain or send PM. > > >> > I agree with Joerg. Good high speed or mixed signal PCB layout is a career > >> > choice, and we electrical engineers already chose our career. A good layout > >> > requires someone who understands not just the software package, but the > >> > details of how the manufacturing operation is going to proceed, what the > >> > limits of the processes are, what the assembly operations require of the > >> > board, and is anal about things like footprint libraries and solder mask > >> > clearances and a thousand other details that I'm only partially aware of. > >> > The more complex your design, the more critical these things become. > > >> > I have two good local outfits for farming out boards. For complex stuff, > >> > they know I'll come to their place and sit next to the designer for a good > >> > bit of the initial placement. While we are doing placement, we are also > >> > discussing critical nets, routing paths, layer usage, etc. That gives us > >> > direct face to face communication and avoids spending lots of time trying to > >> > write/draw everything in gory detail (which gets ignored or misunderstood a > >> > lot of the time). That investment pays big dividends in schedule and board > >> > performance. > > >> > Don't be fooled by the relatively low cost of the software. That's not where > >> > the big costs are. > > >> > I once laid off my entire PCB layout department and sent all the work > >> > outside, because although my employees all knew how to use the software, > >> > none of them could tell me what their completion date would be, or how many > >> > hours it would take, and they certainly weren't interested in meeting > >> > schedules. The outside sources would commit to a cost and a delivery date. > >> > And we already knew they could meet our performance objectives. Fixed price > >> > contracts are great motivators. Missing an engineering test window, or > >> > slipping a production schedule because of a layout delay can be enormously > >> > expensive. > > >> > Of course, if I had let my engineers do their own layouts, the motivation > >> > would have been present, but the technical proficiency would not. How > >> > proficient can anyone become if they only do layout a few times a year? > >> > Also, on many projects engineers use the layout period for other important > >> > things like documentation, test procedures, writing test code, etc. Doing > >> > your own layout serializes these tasks and will stretch your schedule. > > >> > So my advice is to keep doing what you have been doing. Its far more likely > >> > that its the cheapest approach, even though you occasionally have to write a > >> > big check. > > >> > Steve > > >> I tend to agree with the 'farm-it-out' crowd. Unfortunately, my > >> current employer doesn't want to work with my previous layout people, > >> so I've been trying to search for a new partner. I've found plenty of > >> board fab and assembly places, but not so much on the layout. It made > >> me think that the rest of the world did their own layout. The opinions > >> look pretty split from the replies here, maybe it comes down to how > >> many times you do a layout each year, and how much you enjoy that sort > >> of work. I definitely think it's something you have to do fairly often > >> to keep your chops up. > > >> Andy, I'd also like to hear more about your pin-swap FPGA design flow > >> - what tools do that? Also curious about any timing issues that have > >> been caught after the pin-swap. > > >In Altium Designer I use the incredibly useful "subnet jumper" feature > >for BGA's. > >The procedure goes something like this: > >1) Fan out all the required FPGA pins first (automatically or > >manually) to just outside the chip boundry. (leave several diagonal > >entry paths for core and other power flood fills to get in) > >2) Fully route all non-pin-swappable pins and other critical lines. > >3) Ensure any other parts placements are near any required FPGA pins > >or block features you think you might need. > >4) Route every track just short of the fanout tracks > >5) Hit the "add subnet jumper" feature and it finishes the tracks and > >does all the pin swaps for you and updates the schematic. > > >Probably needs a picture or two to explain it best though... > > >The great part about subnet jumpers is if there are timing or other > >problems you can just remove the subnet jumpers and add/edit tracks > >and pins as needed and then replace the subnet jumpers. Only takes a > >minute or two. > > >Dave. > > That does sound specific to one particular tool (vendors's software).Yes, it is specific to Altium Designer. It's their way of simplifying FPGA design and layout. Dave.
Reply by ●April 26, 20082008-04-26
Joerg wrote:> The latter is a concern in my field (medical). We need to be able to > inspect.For medical devices/equipment, I'd be concerned with getting an RoHS waiver and non-green parts and solder, so that the device/equipment isn't likely to fail in a few years due to tin wiskers and harm the patient.
Reply by ●April 26, 20082008-04-26
Eric Smith wrote:> Joerg wrote: >> The latter is a concern in my field (medical). We need to be able to >> inspect. > > For medical devices/equipment, I'd be concerned with getting an RoHS > waiver and non-green parts and solder, so that the device/equipment > isn't likely to fail in a few years due to tin wiskers and harm the > patient.Sure. However, about a year ago we learned that we better brace ourselves for not so good things to come: http://www.greensupplyline.com/howto/192300282 -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
Reply by ●April 27, 20082008-04-27
On Fri, 25 Apr 2008 10:19:34 -0700, Joerg <notthisjoergsch@removethispacbell.net> wrote:>JosephKK wrote: >> On Thu, 17 Apr 2008 17:13:27 -0400, "Steve" <sjburke1@comcast.net> >> wrote: >> >>> "Joerg" <notthisjoergsch@removethispacbell.net> wrote in message >>> news:U5MNj.6956$GE1.6193@nlpi061.nbdc.sbc.com... >>>> qrk wrote: >>>>> On Thu, 17 Apr 2008 09:43:09 -0700 (PDT), Dave <dhschetz@gmail.com> >>>>> wrote: >>>>> >>>>>> Does anybody out there have a good methodology for determining your >>>>>> optimal FPGA pinouts, for making PCB layouts nice, pretty, and clean? >>>>>> The brute force method is fairly maddening. I'd be curious to hear if >>>>>> anybody has any 'tricks of the trade' here. >>>>>> >>>>>> Also, just out of curiosity, how many of you do your own PCB layout, >>>>>> versus farming it out? It would certainly save us a lot of money to >>>>>> buy the tools and do it ourselves, but it seems like laying out a >>>>>> board out well requires quite a bit of experience, especially a 6-8 >>>>>> layer board with high pin count FPGA's. >>>>>> >>>>>> We're just setting up a hardware shop here, and although I've been >>>>>> doing FPGA and board schematics design for a while, it's always been >>>>>> at a larger company with resources to farm the layout out, and we >>>>>> never did anything high-speed to really worry about the board layout >>>>>> too much. Thanks in advance for your opinions. >>>>>> >>>>>> Dave >>>>> Sure wish there was a slick way of doing FPGA pinouts. I usually use >>>>> graph paper and figure out the FPGA pinout to other parts to minimize >>>>> routing snarls. >>>>> >>>>> I do pcb layouts on my own and other folks designs. Our boards have >>>>> high-speed routing, switching power supplies, and high-gain analog >>>>> stuff; sometimes all on the same board. Unless the service bureau has >>>>> someone who understands how to lay out such circuitry and place >>>>> sensitive analog stuff near digital junk, it is more trouble to farm >>>>> out than do it yourself if you want the board to work on the first >>>>> cut. >>>>> >>>> Or find a good layouter and develop a long-term business relationship. My >>>> layouter knows just from looking at a schematic which areas are critical. >>>> He's a lot older than I am and that is probably one of the reasons why his >>>> stuff works without much assistance from me. Nothing can replace a few >>>> decades of experience. >>>> >>>> >>>>> Doing your own layout will take a lot of learning to master the PCB >>>>> layout program and what your board vendor can handle. It will take 5 >>>>> to 10 complicated boards to become mildly proficient at layout. I >>>>> don't know about saving cost. Your time may be better spent doing >>>>> other activities rather than learning about layout and doing the >>>>> layouts. ... >>>> >>>> Yep, that's why I usually do not do my own layouts. Occassionally I route >>>> a small portion of a circuit and send that to my layouter. No DRC or >>>> anything, just to show him how I'd like it done. >>>> >>>> >>>>> ... The upside to doing your own layout - you control the whole >>>>> design from start to finish. If you have a challenging layout, you'll >>>>> have a much higher probability of having a working board on the first >>>>> try which has hidden savings (getting to market earlier <- less >>>>> troubleshooting + less respins). >>>>> >>>>> --- >>>>> Mark >>>> >>>> -- >>>> Regards, Joerg >>>> >>>> http://www.analogconsultants.com/ >>>> >>>> "gmail" domain blocked because of excessive spam. >>>> Use another domain or send PM. >>> I agree with Joerg. Good high speed or mixed signal PCB layout is a career >>> choice, and we electrical engineers already chose our career. A good layout >>> requires someone who understands not just the software package, but the >>> details of how the manufacturing operation is going to proceed, what the >>> limits of the processes are, what the assembly operations require of the >>> board, and is anal about things like footprint libraries and solder mask >>> clearances and a thousand other details that I'm only partially aware of. >>> The more complex your design, the more critical these things become. >>> >>> I have two good local outfits for farming out boards. For complex stuff, >>> they know I'll come to their place and sit next to the designer for a good >>> bit of the initial placement. While we are doing placement, we are also >>> discussing critical nets, routing paths, layer usage, etc. That gives us >>> direct face to face communication and avoids spending lots of time trying to >>> write/draw everything in gory detail (which gets ignored or misunderstood a >>> lot of the time). That investment pays big dividends in schedule and board >>> performance. >>> >>> Don't be fooled by the relatively low cost of the software. That's not where >>> the big costs are. >>> >>> I once laid off my entire PCB layout department and sent all the work >>> outside, because although my employees all knew how to use the software, >>> none of them could tell me what their completion date would be, or how many >>> hours it would take, and they certainly weren't interested in meeting >>> schedules. The outside sources would commit to a cost and a delivery date. >>> And we already knew they could meet our performance objectives. Fixed price >>> contracts are great motivators. Missing an engineering test window, or >>> slipping a production schedule because of a layout delay can be enormously >>> expensive. >>> >>> Of course, if I had let my engineers do their own layouts, the motivation >>> would have been present, but the technical proficiency would not. How >>> proficient can anyone become if they only do layout a few times a year? >>> Also, on many projects engineers use the layout period for other important >>> things like documentation, test procedures, writing test code, etc. Doing >>> your own layout serializes these tasks and will stretch your schedule. >>> >>> So my advice is to keep doing what you have been doing. Its far more likely >>> that its the cheapest approach, even though you occasionally have to write a >>> big check. >>> >>> Steve >>> >> >> Pretty much honest responses. Almost all of good value. >> >> Mark hinted and Joerg mentioned one of the foremost subjects, >> floorplanning. This will impact everything you do. From the original >> schematic drawing to the FPGA VHDL/Verilog coding and optimizing to >> PWB layout , documentation, and testing. Each of these activities >> requires floorplanning to get good results. To achieve the best PWD >> layout results make several different versions for your first few >> boards and route them all to completion. It will make huge >> improvements in your understanding. >> > >Right. The same goes for code, especially micro controllers. Without >spending a lot of time on a floor plan chances are it won't fit in or >it'll become a hodge-podge of code snippets somehow stitched together. >Seen a lot of that :-( > >There seems to be a huge software company up north that has in part lost >the art of good floorplanning ...Actually it never had it.
Reply by ●April 27, 20082008-04-27
On Sat, 26 Apr 2008 09:05:27 -0700, Joerg <notthisjoergsch@removethispacbell.net> wrote:>Eric Smith wrote: >> Joerg wrote: >>> The latter is a concern in my field (medical). We need to be able to >>> inspect. >> >> For medical devices/equipment, I'd be concerned with getting an RoHS >> waiver and non-green parts and solder, so that the device/equipment >> isn't likely to fail in a few years due to tin wiskers and harm the >> patient. > > >Sure. However, about a year ago we learned that we better brace >ourselves for not so good things to come: > >http://www.greensupplyline.com/howto/192300282Yep. Volume issues. All the standard parts are RoHS. Then the questions get asked. Fortunately there are recent 4-element alloys that have fairly good properties and seem to lack tin whisker problems. Nothing fully qualified for space / life critical quite yet, but it is on the horizon.
Reply by ●April 27, 20082008-04-27
JosephKK wrote:> On Fri, 25 Apr 2008 10:19:34 -0700, Joerg > <notthisjoergsch@removethispacbell.net> wrote: > >> JosephKK wrote: >>> On Thu, 17 Apr 2008 17:13:27 -0400, "Steve" <sjburke1@comcast.net> >>> wrote: >>> >>>> "Joerg" <notthisjoergsch@removethispacbell.net> wrote in message >>>> news:U5MNj.6956$GE1.6193@nlpi061.nbdc.sbc.com... >>>>> qrk wrote: >>>>>> On Thu, 17 Apr 2008 09:43:09 -0700 (PDT), Dave <dhschetz@gmail.com> >>>>>> wrote: >>>>>> >>>>>>> Does anybody out there have a good methodology for determining your >>>>>>> optimal FPGA pinouts, for making PCB layouts nice, pretty, and clean? >>>>>>> The brute force method is fairly maddening. I'd be curious to hear if >>>>>>> anybody has any 'tricks of the trade' here. >>>>>>> >>>>>>> Also, just out of curiosity, how many of you do your own PCB layout, >>>>>>> versus farming it out? It would certainly save us a lot of money to >>>>>>> buy the tools and do it ourselves, but it seems like laying out a >>>>>>> board out well requires quite a bit of experience, especially a 6-8 >>>>>>> layer board with high pin count FPGA's. >>>>>>> >>>>>>> We're just setting up a hardware shop here, and although I've been >>>>>>> doing FPGA and board schematics design for a while, it's always been >>>>>>> at a larger company with resources to farm the layout out, and we >>>>>>> never did anything high-speed to really worry about the board layout >>>>>>> too much. Thanks in advance for your opinions. >>>>>>> >>>>>>> Dave >>>>>> Sure wish there was a slick way of doing FPGA pinouts. I usually use >>>>>> graph paper and figure out the FPGA pinout to other parts to minimize >>>>>> routing snarls. >>>>>> >>>>>> I do pcb layouts on my own and other folks designs. Our boards have >>>>>> high-speed routing, switching power supplies, and high-gain analog >>>>>> stuff; sometimes all on the same board. Unless the service bureau has >>>>>> someone who understands how to lay out such circuitry and place >>>>>> sensitive analog stuff near digital junk, it is more trouble to farm >>>>>> out than do it yourself if you want the board to work on the first >>>>>> cut. >>>>>> >>>>> Or find a good layouter and develop a long-term business relationship. My >>>>> layouter knows just from looking at a schematic which areas are critical. >>>>> He's a lot older than I am and that is probably one of the reasons why his >>>>> stuff works without much assistance from me. Nothing can replace a few >>>>> decades of experience. >>>>> >>>>> >>>>>> Doing your own layout will take a lot of learning to master the PCB >>>>>> layout program and what your board vendor can handle. It will take 5 >>>>>> to 10 complicated boards to become mildly proficient at layout. I >>>>>> don't know about saving cost. Your time may be better spent doing >>>>>> other activities rather than learning about layout and doing the >>>>>> layouts. ... >>>>> Yep, that's why I usually do not do my own layouts. Occassionally I route >>>>> a small portion of a circuit and send that to my layouter. No DRC or >>>>> anything, just to show him how I'd like it done. >>>>> >>>>> >>>>>> ... The upside to doing your own layout - you control the whole >>>>>> design from start to finish. If you have a challenging layout, you'll >>>>>> have a much higher probability of having a working board on the first >>>>>> try which has hidden savings (getting to market earlier <- less >>>>>> troubleshooting + less respins). >>>>>> >>>>>> --- >>>>>> Mark >>>>> -- >>>>> Regards, Joerg >>>>> >>>>> http://www.analogconsultants.com/ >>>>> >>>>> "gmail" domain blocked because of excessive spam. >>>>> Use another domain or send PM. >>>> I agree with Joerg. Good high speed or mixed signal PCB layout is a career >>>> choice, and we electrical engineers already chose our career. A good layout >>>> requires someone who understands not just the software package, but the >>>> details of how the manufacturing operation is going to proceed, what the >>>> limits of the processes are, what the assembly operations require of the >>>> board, and is anal about things like footprint libraries and solder mask >>>> clearances and a thousand other details that I'm only partially aware of. >>>> The more complex your design, the more critical these things become. >>>> >>>> I have two good local outfits for farming out boards. For complex stuff, >>>> they know I'll come to their place and sit next to the designer for a good >>>> bit of the initial placement. While we are doing placement, we are also >>>> discussing critical nets, routing paths, layer usage, etc. That gives us >>>> direct face to face communication and avoids spending lots of time trying to >>>> write/draw everything in gory detail (which gets ignored or misunderstood a >>>> lot of the time). That investment pays big dividends in schedule and board >>>> performance. >>>> >>>> Don't be fooled by the relatively low cost of the software. That's not where >>>> the big costs are. >>>> >>>> I once laid off my entire PCB layout department and sent all the work >>>> outside, because although my employees all knew how to use the software, >>>> none of them could tell me what their completion date would be, or how many >>>> hours it would take, and they certainly weren't interested in meeting >>>> schedules. The outside sources would commit to a cost and a delivery date. >>>> And we already knew they could meet our performance objectives. Fixed price >>>> contracts are great motivators. Missing an engineering test window, or >>>> slipping a production schedule because of a layout delay can be enormously >>>> expensive. >>>> >>>> Of course, if I had let my engineers do their own layouts, the motivation >>>> would have been present, but the technical proficiency would not. How >>>> proficient can anyone become if they only do layout a few times a year? >>>> Also, on many projects engineers use the layout period for other important >>>> things like documentation, test procedures, writing test code, etc. Doing >>>> your own layout serializes these tasks and will stretch your schedule. >>>> >>>> So my advice is to keep doing what you have been doing. Its far more likely >>>> that its the cheapest approach, even though you occasionally have to write a >>>> big check. >>>> >>>> Steve >>>> >>> Pretty much honest responses. Almost all of good value. >>> >>> Mark hinted and Joerg mentioned one of the foremost subjects, >>> floorplanning. This will impact everything you do. From the original >>> schematic drawing to the FPGA VHDL/Verilog coding and optimizing to >>> PWB layout , documentation, and testing. Each of these activities >>> requires floorplanning to get good results. To achieve the best PWD >>> layout results make several different versions for your first few >>> boards and route them all to completion. It will make huge >>> improvements in your understanding. >>> >> Right. The same goes for code, especially micro controllers. Without >> spending a lot of time on a floor plan chances are it won't fit in or >> it'll become a hodge-podge of code snippets somehow stitched together. >> Seen a lot of that :-( >> >> There seems to be a huge software company up north that has in part lost >> the art of good floorplanning ... > > Actually it never had it. >:-) Although I must say that the folks who designed MS-Works did a fine job. Even the Windows versions of it never crashed on me. That is quite unusual for Windows programs. -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
Reply by ●April 27, 20082008-04-27
JosephKK wrote:> On Sat, 26 Apr 2008 09:05:27 -0700, Joerg > <notthisjoergsch@removethispacbell.net> wrote: > >> Eric Smith wrote: >>> Joerg wrote: >>>> The latter is a concern in my field (medical). We need to be able to >>>> inspect. >>> For medical devices/equipment, I'd be concerned with getting an RoHS >>> waiver and non-green parts and solder, so that the device/equipment >>> isn't likely to fail in a few years due to tin wiskers and harm the >>> patient. >> >> Sure. However, about a year ago we learned that we better brace >> ourselves for not so good things to come: >> >> http://www.greensupplyline.com/howto/192300282 > > Yep. Volume issues. All the standard parts are RoHS. Then the > questions get asked. Fortunately there are recent 4-element alloys > that have fairly good properties and seem to lack tin whisker > problems. Nothing fully qualified for space / life critical quite > yet, but it is on the horizon. >I just hope RoHS doesn't blow up in our face like other hip-shot decisions by politicos. Such as MTBE in California gasoline. But it might. Only time will tell. -- Regards, Joerg http://www.analogconsultants.com/ "gmail" domain blocked because of excessive spam. Use another domain or send PM.
