Chirp generator / CORDIC algo ?

Hello,

I am on a project of developping a chirp generator on a FPGA. Reading
from the internet I learned that the CORDIC algorithm is broadly used
when we want to synthesis sin functions.

My supervisor told me that we will be doing the "mathematical" part
with Matlab and then store the data in the FPGA, the signal will then
be "produced" by the FPGA to the output and we will use a DAC to
convert into an analog signal.

The explanation about using data stored into the FPGA is the need of
fast generation, the signal will be at 200 MSps.

Here is my question (because I have to be honnest I don't know
anything about analog signal generation with an fpga), is it possible
with the CORDIC algorithm to produce such a signal with high speed of
200 MSps. Is there any "better" solution since we will be using a
VIRTEX V.

Do you think the MATLAB solution is the best option (maybe the easiest
at least), because we will have to connect the FPGA to a PC, which
makes me think (but only by intuition) that it is a loss a FPGA
capabilities.

X

XSterna wrote:
> Hello,
> 
> I am on a project of developing a chirp generator on a FPGA. Reading
> from the internet I learned that the CORDIC algorithm is broadly used
> when we want to synthesis sin functions.
> 
> My supervisor told me that we will be doing the "mathematical" part
> with Matlab and then store the data in the FPGA, the signal will then
> be "produced" by the FPGA to the output and we will use a DAC to
> convert into an analog signal.
> 
> The explanation about using data stored into the FPGA is the need of
> fast generation, the signal will be at 200 MSps.
> 
> Here is my question (because I have to be honest I don't know
> anything about analog signal generation with an fpga), is it possible
> with the CORDIC algorithm to produce such a signal with high speed of
> 200 MSps. Is there any "better" solution since we will be using a
> VIRTEX V.
> 
> Do you think the MATLAB solution is the best option (maybe the easiest
> at least), because we will have to connect the FPGA to a PC, which
> makes me think (but only by intuition) that it is a loss a FPGA
> capabilities.

I hope you are aware that there are a number of high performance chips 
available for chirp generation. For example:
http://www.analog.com/en/prod/0,,770_843_AD9858,00.html
We might want to take a look at how they do chirp generation.

You could use a cordic algorithm, but you would need to "unroll" it (it 
is an iterative algorithm), I would not suggest doing that, though.

It sounds like you mean that your supervisor wants to store the entire 
chirp on the FPGA? Normally a better solution would be to store a sine 
lookup table on the FPGA, and implement a phase accumulator to drive it.

I am not sure what you mean about connecting the FPGA to a PC to use 
Matlab. I commonly generate a data file with Matlab, and then use a bit 
of C code to turn that into a VHDL package, which then gets compiled 
into the FPGA. However, that would only work in this case if there were 
only a couple possible chirps being used.

> I hope you are aware that there are a number of high performance chips
> available for chirp generation. For example:http://www.analog.com/en/prod/0,,770_843_AD9858,00.html
> We might want to take a look at how they do chirp generation.

Well to be honest, no i did not know :)
My project is part of a much bigger one and some of the components
seems (i have to get confirmation) to be imposed.
Anyway, I'm also looking for the best solution I can make so this is
the kind of proposition I will "study" carefully. Thank you !

> You could use a cordic algorithm, but you would need to "unroll" it (it
> is an iterative algorithm), I would not suggest doing that, though.

Ok, so I think I going to forget Cordic :)

> It sounds like you mean that your supervisor wants to store the entire
> chirp on the FPGA? Normally a better solution would be to store a sine
> lookup table on the FPGA, and implement a phase accumulator to drive it.

I will have confirmation soon about this aspect, it seems that this is
not clear at the moment. But from what i understood, yes we are going
to store the entire chirp signal in the FPGA. Normally, the FPGA does
not have to generate the signal, he only has to use to data about it.

> I am not sure what you mean about connecting the FPGA to a PC to use
> Matlab. I commonly generate a data file with Matlab, and then use a bit
> of C code to turn that into a VHDL package, which then gets compiled
> into the FPGA. However, that would only work in this case if there were
> only a couple possible chirps being used.

Yes, that's more about what you say. I don't think we are going to
control Matlab by an FPGA :) The main idea is that the chirp will be
done by Matlab and then the data from the computer will be send to the
FPGA. So we will have a link between the PC and the FPGA. Since the
FPGA is capable of doing calculation I just though we could forget the
PC which will be a sort of "gain" in the project.

Thank you very much for your help and your ideas, I'm going to work on
it to see what is possible in the context of my project :)
The main idea for me is clearly to make the most of the Virtex V.

X

XSterna wrote:
> Hello,
> 
> I am on a project of developping a chirp generator on a FPGA. Reading
> from the internet I learned that the CORDIC algorithm is broadly used
> when we want to synthesis sin functions.
> 
> My supervisor told me that we will be doing the "mathematical" part
> with Matlab and then store the data in the FPGA, the signal will then
> be "produced" by the FPGA to the output and we will use a DAC to
> convert into an analog signal.
> 
> The explanation about using data stored into the FPGA is the need of
> fast generation, the signal will be at 200 MSps.
> 
> Here is my question (because I have to be honnest I don't know
> anything about analog signal generation with an fpga), is it possible
> with the CORDIC algorithm to produce such a signal with high speed of
> 200 MSps. Is there any "better" solution since we will be using a
> VIRTEX V.
> 
> Do you think the MATLAB solution is the best option (maybe the easiest
> at least), because we will have to connect the FPGA to a PC, which
> makes me think (but only by intuition) that it is a loss a FPGA
> capabilities.
> 
> X
First of all, in something like a Virtex-5, you can easily achieve 
200Msps for a chirp.  I don't know that I would recommend CORDIC for 
creating a sine.  It's no longer the most resource-efficient method for 
creating a sinusoid.  A quarter-wave lookup in a 1024-deep Xilinx 
blockROM will give you 12 bits of phase resolution.  You can augment 
that with a first-order Taylor correction if you needed more precision.

A chirp could be implemented with a DDS-type structure.  A phase 
accumulator (NCO) would be connected to the sin/cos ROM.  The phase 
increment in the phase accumulator would be a counter that would 
increase linearly to produce the chirp.

I'm not sure what Matlab solution you're talking about, but you could 
use Xilinx's SysGen.  It has accumulator and quarter-wave sin/cos ROM 
blocks which you could wire together fairly quickly and test in the 
Matlab/Simulink environment.  Although it might not yield the fastest 
implementation, it should get you 200Msps in a Virtex-5.
-Kevin

> A chirp could be implemented with a DDS-type structure.  A phase 
> accumulator (NCO) would be connected to the sin/cos ROM.  The phase 
> increment in the phase accumulator would be a counter that would 
> increase linearly to produce the chirp.

Actually, I meant that the phase increment would *decrease*, if you want 
to produce a rising chirp.  -Kevin

Thank you very much for your help.

I will work on all ideas because I'm a beginner in all that, so I need
time to understand everything :)

X

"XSterna" <XSterna@gmail.com> wrote in message 
news:6e540612-5af3-4031-851e-ed4a27d20bc8@m3g2000hsc.googlegroups.com...
>
> I will work on all ideas because I'm a beginner in all that, so I need
> time to understand everything :)

Basically your supervisor told you that the FPGA will be used to store an 
arbitrary waveform and to send it to the DAC. No math is supposed to be done 
in it. You are supposed to use MATLAB to design the waveform and then upload 
(or is it download? :)) it to the memory in the FPGA. The FPGA will then 
simply read it back with the DAC sample rate... If you don't need to change 
your waveform quickly and/or you need to be able to "play back" some other 
waveforms then it is the way to go. Otherwise you could drop the MATLAB part 
and design your own hardware chirp generator as Kevin described.

/Mikhail

On May 1, 8:55 pm, "MM" <mb...@yahoo.com> wrote:
> "XSterna" <XSte...@gmail.com> wrote in message
>
> news:6e540612-5af3-4031-851e-ed4a27d20bc8@m3g2000hsc.googlegroups.com...
>
>
>
> > I will work on all ideas because I'm a beginner in all that, so I need
> > time to understand everything :)
>
> Basically your supervisor told you that the FPGA will be used to store an
> arbitrary waveform and to send it to the DAC. No math is supposed to be done
> in it. You are supposed to use MATLAB to design the waveform and then upload
> (or is it download? :)) it to the memory in the FPGA. The FPGA will then
> simply read it back with the DAC sample rate... If you don't need to change
> your waveform quickly and/or you need to be able to "play back" some other
> waveforms then it is the way to go. Otherwise you could drop the MATLAB part
> and design your own hardware chirp generator as Kevin described.
>
> /Mikhail

The Matlab could be (and maybe will be) the best solution but in fact
we will have different chirps to generate. This solution is dependent
to a computer. I will explore the DDS idea and see if I can do it and
if we can meet all the requirements.

Xavier

Sure, you can use CORDIC to generate a chirp at 200 MHz, even with older 
FPGAs (e.g. original virtex in the faster speed grades was capable of 
this).  However, with the large memories available on modern devices, it 
probably makes sense to use a combination of a look-up and an 
interpolation or Taylor series to get resolutions you are likely to 
need.  The CORDIC is still handy if you have very high phase or 
amplitude resolution requirements, but generally speaking it is no 
longer the best way to generate a sine in current FPGAs.

XSterna wrote:
> Hello,
> 
> I am on a project of developping a chirp generator on a FPGA. Reading
> from the internet I learned that the CORDIC algorithm is broadly used
> when we want to synthesis sin functions.
> 
> My supervisor told me that we will be doing the "mathematical" part
> with Matlab and then store the data in the FPGA, the signal will then
> be "produced" by the FPGA to the output and we will use a DAC to
> convert into an analog signal.
> 
> The explanation about using data stored into the FPGA is the need of
> fast generation, the signal will be at 200 MSps.
> 
> Here is my question (because I have to be honnest I don't know
> anything about analog signal generation with an fpga), is it possible
> with the CORDIC algorithm to produce such a signal with high speed of
> 200 MSps. Is there any "better" solution since we will be using a
> VIRTEX V.
> 
> Do you think the MATLAB solution is the best option (maybe the easiest
> at least), because we will have to connect the FPGA to a PC, which
> makes me think (but only by intuition) that it is a loss a FPGA
> capabilities.
> 
> X

As I need to develop this solution in about 4 months, all the people
on the project advice me to use the matlab idea because it's the
easiest to have the work done within the deadlines. There are no
longer problem with a PC Link because the FPGA boards have a embedded
Flash memory where i will be able to save the datas.

I still be curious about the lookup table because as I told you I
don't have any experience in all that. Do you have any information
(links or book references) about this method ? I have at the moment no
idea about the memory I will need for all the chirps, so it could be a
good solution.

Finally, even if it's maybe not the "philosophic" way of doing it,
what do you think about storing all the datas we need (different
chirps) and just using the FPGA to generate the signal at the speed
wanted ?

Xavier