Seems there is room for one more ? http://www.siliconbluetech.com/news.html This seems to push the low-power envelope a little higher in total gates (but still small, compared to the top-end FPGAs). What IS new, is the combination of 65nm process, and uA Icc numbers. They also have targeted 32Khz operation, a data point many others simply ignore. Look to be still in early-silicon stages.... Anyone actually got some devices/tools ? -jg
A new FPGA company comes out of Stealth mode - SiliconBlue
Started by ●June 4, 2008
Reply by ●June 5, 20082008-06-05
On Jun 4, 9:48 pm, Jim Granville <no.s...@designtools.maps.co.nz> wrote:> Seems there is room for one more ? > > http://www.siliconbluetech.com/news.html > > This seems to push the low-power envelope a little higher in > total gates (but still small, compared to the top-end FPGAs). > > What IS new, is the combination of 65nm process, and uA Icc numbers. > > They also have targeted 32Khz operation, a data point many others > simply ignore. > > Look to be still in early-silicon stages.... > > Anyone actually got some devices/tools ? > > -jgThere is an article on them in FPGA journal: http://www.fpgajournal.com/articles_2008/20080603_newkid.htm I have looked at their website and it seems that they are not ready for a lot of small customers at this time (no sales office or distributor listings). My guess is that their continued success is based on their ability to land designs in high-volume consumer handheld devices. By the way, the FPGA Journal article seems to imply that the OTP non-volatile memory can hold more than one configuration. The datasheet does not bear this out. Cheers, Gabor
Reply by ●June 5, 20082008-06-05
Gabor, I believe they have a new memory technology, where they can OTP the device, and then even after that, they can reload a bitstream into SRAM. Thus, you may prototype by just downloading streams until it is correct, and then do the OTP step to "freeze" that stream in place. This avoids the traditional OTP (fuse) problem of wasting parts until you get it right. It also allows you to test the parts before you ship them (unlike fuse FPGAs). They have a number of ex-X employees working there. Good luck guys (I mean it)! Austin
Reply by ●June 5, 20082008-06-05
On 5 Jun, 16:39, austin <aus...@xilinx.com> wrote:> Gabor, > > I believe they have a new memory technology, where they can OTP the > device, and then even after that, they can reload a bitstream into SRAM. > > Thus, you may prototype by just downloading streams until it is correct, > and then do the OTP step to "freeze" that stream in place. > > This avoids the traditional OTP (fuse) problem of wasting parts until > you get it right. =A0It also allows you to test the parts before you ship > them (unlike fuse FPGAs). > > They have a number of ex-X employees working there.Perhaps they will take on some more, now that Xilinx is laying off staff. 8-) Leon
Reply by ●June 5, 20082008-06-05
Leon, Seriously, it is an opportunity for any company in the FPGA/PLD business (no joke here). If you are expert in FPGA design, test, verification, programming (anything), then there is not a lot of places where you could go that would use all of your skills. As long as they honor their agreement not to disclose proprietary or confidential information, then they are OK to go... It may seem odd, but we have employees who have gone to another FPGA company, and then come back. Sometimes more than once! Austin Leon wrote:> On 5 Jun, 16:39, austin <aus...@xilinx.com> wrote: >> Gabor, >> >> I believe they have a new memory technology, where they can OTP the >> device, and then even after that, they can reload a bitstream into SRAM. >> >> Thus, you may prototype by just downloading streams until it is correct, >> and then do the OTP step to "freeze" that stream in place. >> >> This avoids the traditional OTP (fuse) problem of wasting parts until >> you get it right. It also allows you to test the parts before you ship >> them (unlike fuse FPGAs). >> >> They have a number of ex-X employees working there. > > Perhaps they will take on some more, now that Xilinx is laying off > staff. 8-) > > Leon
Reply by ●June 5, 20082008-06-05
On Jun 5, 2:44 pm, austin <aus...@xilinx.com> wrote:> Leon, > > It may seem odd, but we have employees who have gone to another FPGA > company, and then come back. Sometimes more than once!That reminds me of the old Volvo commercial where the guy is talking to his neighbor about the new Volvo he bought. The neighbor says about his own car (some American Belchfire 2000 type thing), "I've bought 12 of them in the last 18 years! If they weren't so good, why would I buy so many?" Rick
Reply by ●June 5, 20082008-06-05
On 5 Jun., 17:39, austin <aus...@xilinx.com> wrote:> Gabor, > > I believe they have a new memory technology, where they can OTP the > device, and then even after that, they can reload a bitstream into SRAM. > > Thus, you may prototype by just downloading streams until it is correct, > and then do the OTP step to "freeze" that stream in place. > > This avoids the traditional OTP (fuse) problem of wasting parts until > you get it right. It also allows you to test the parts before you ship > them (unlike fuse FPGAs).The datasheet states, they use on-chip flash to store the bitstream and configure SRAM from this flash. AFAIK is this similar to Lattice FPGAs. The power consumption seems to me very impressive. I wonder, if the numbers are usable for real designs. It might be interesting to here someone independend comparing Actel Iglooplus and Lattice against this technology. bye Thomas
Reply by ●June 5, 20082008-06-05
austin wrote:> Gabor, > > I believe they have a new memory technology, where they can OTP the > device, and then even after that, they can reload a bitstream into SRAM. > > Thus, you may prototype by just downloading streams until it is correct, > and then do the OTP step to "freeze" that stream in place. > > This avoids the traditional OTP (fuse) problem of wasting parts until > you get it right. It also allows you to test the parts before you ship > them (unlike fuse FPGAs).That is not really 'new' - other devices out there, already allow config without memory access/pgm. - ie a volatile config. It can also be useful for board testing (and maybe hacking ;) Most of the simpler applications, have quite stable PLD code, so OTP is not a big hurdle, unless it has other gotchas. The Volatile mode covers development. It certainly DOES save in process costs, and allows a couple of generation jumps, which for a FPGA matters much more. [ I think some other vendors OTP is VERY slow to pgm ? ] -jg
Reply by ●June 5, 20082008-06-05
Gabor wrote:> By the way, the FPGA Journal article seems to imply that the > OTP non-volatile memory can hold more than one configuration. > The datasheet does not bear this out.Might be some models only ? It's a simple trade off, if the die-area of memory is really as small as their graphics indicate, then you can mitigate part of OTP drawbacks, by allowing (eg) TWICE the config. (plus you also cover other uses, like Test modes, or country-modes etc) Be interesting to see their Device Program times, AND their OTP memory Yields (that's another OTP drawback: yield < 100%). Even in Microcontrollers, companies like Silabs are releasing OTP variants, at sigificantly lower prices than flash. That suggests either the FAB, or TESTING, (or both) costs are quite large. -jg
Reply by ●June 6, 20082008-06-06
On Thu, 05 Jun 2008 08:39:39 -0700, austin <austin@xilinx.com> wrote:>Gabor, > >I believe they have a new memory technology, where they can OTP the >device, and then even after that, they can reload a bitstream into SRAM. > >Thus, you may prototype by just downloading streams until it is correct, >and then do the OTP step to "freeze" that stream in place. > >This avoids the traditional OTP (fuse) problem of wasting parts until >you get it right. It also allows you to test the parts before you ship >them (unlike fuse FPGAs). > >They have a number of ex-X employees working there. > >Good luck guys (I mean it)! > >AustinThere was something in one of the trade mags this week about this - they claim the OTP uses 2% of the die - I think it was a TSMC process called something like oxide disruption The big selling point appears to be low power draw - tens of uA at 32KHz and a <10mA at 200MHz filled with counters. ISTR. There are some datasheets up at : http://www.siliconbluetech.com/ Nothing about how/where/when to buy though....
