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Free PCI-bridge in VHDL for Spartan-IIE

Started by Torsten Lauter February 23, 2004
Free PCI-bridge in VHDL for Spartan-IIE

Somebody knows the implementation of
http://www.infotech.tu-chemnitz.de/~tlau/pci_bridge

Regards.
__________________________________________________________________ Torsten
Lauter ICQ#: 14492119 Current ICQ status: + More ways to contact me
__________________________________________________________________


Torsten,

what do you mean by "Free" ?
on the link there is notice

"if interested please contact using a form" - there is no reference to any
form or download location or conditions.
so what it is all about?

also the website says the ref design uses Spartan III not IIE ?

antti
www.openchip.org


"Torsten Lauter" <tlau@infotech.tu-chemnitz.de> wrote in message
news:c1d6q4$blt$1@anderson.hrz.tu-chemnitz.de...
> Free PCI-bridge in VHDL for Spartan-IIE > > Somebody knows the implementation of > http://www.infotech.tu-chemnitz.de/~tlau/pci_bridge > > Regards. > __________________________________________________________________ Torsten > Lauter ICQ#: 14492119 Current ICQ status: + More ways to contact me > __________________________________________________________________ > >
Hi,

Mine isn't going to be free, but . . . I am considering releasing a PCI
IP core I have been working on for quite some time, and I am trying to
gauge the demand out there for a commercial-grade PCI IP core for
personal users.
However, the PCI IP core itself probably won't be available for another
three months at the earliest (I still need to fix some minor problems,
and setup the infrastructure before the release.).
The price I am thinking of charging for my PCI IP core is only $100
(USD) as long as the licensee meets the following conditions.

* The licensee resides within the United States (Don't have to be a US
citizen.).
* The licensee Will agree that the PCI IP core will be used only for
non-commercial, non-profit, non-academic research, and personal
purposes.
* The licensee is will agree, sign, and mail back to a license agreement
form I will provide.
* The licensee will pay for the PCI IP core license through an online
payment source like PayPal.



This is what my PCI IP core looks like:

* PCI Local Bus Revision 2.2 compliant.
* Burst initiator/target access support.
* 6 Base Address Register (BAR) and Expansion ROM BAR support.
* Meets 33MHz PCI timings with Spartan-II-5 (Currently, no 66MHz PCI
support with any device due to setup time issues . . .).
* General purpose PCI testbench comes with a PCI arbiter, PCI host
bridge emulator, and PCI target device to allow the user to quickly
debug their design.
* The PCI IP core supplied in NGO netlist format (Xilinx's proprietary
netlist format.).
* Nominally supports Xilinx Virtex, Spartan-II, or newer FPGAs.
* Constraint file supplied for Spartan-II PQ208 and FG456 package,
Virtex-E XCV300E BG432 package, Insight Electronics Spartan-II 150 PCI
card, and Spartan-II 200 PCI card.
* Comes with three reference designs (Two similar target only designs
and one target/initiator design.).
* Fully supports Verilog (Reference designs and the PCI testbench are
written in Verilog.).
* Limited VHDL support (No reference designs and PCI testbench. Might do
VHDL porting of reference designs and PCI testbench someday, but I won't
guarantee that.).
* Supports ISE WebPACK 3.2 or later (The use of ISE WebPACK 5.1 or later
is strongly recommended.).
* Should work with paid version (non-WebPACK) ISE software, but hasn't
been tested.
* Free Xilinx ISE WebPACK and ModelSim XE-Starter can be used to
simulate, synthesize, place & route, and generate a bitstream file.
* Should work with non-XST synthesis tools, but hasn't been tested.


        The PCI IP core will also be available for commercial licensees
in NGO netlist format or as Verilog RTL code, but they will cost
considerably more than $100 (Especially the Verilog RTL license.).
The motivation behind this $100 license is to allow hobbyists to build
their own PCI device for about $500 ($275 for Insight Electronics
Spartan-II 200 PCI card with a parallel port JTAG cable, $100 for the
PCI IP core license, $100 for a printed copy of PCI specification from
PCI-SIG, and other miscellaneous costs like shipping cost and sales
tax.) without having them to spend too much time designing their own PCI
interface.
My guess is that there are probably a few hundred people in the United
States who will rather license a PCI IP core with testbench for $100
than to do their own or use Opencores.org PCI IP core.
I believe this PCI IP core is a great learning vehicle for those who
want to learn programmable logic or Verilog, or for use in a student
project (The student can concentrate on backend logic rather than the
PCI bus.).
Let me know if anyone is interesting in this product.


Kevin Brace




Antti Lukats wrote:
> > Torsten, > > what do you mean by "Free" ? > on the link there is notice > > "if interested please contact using a form" - there is no reference to any > form or download location or conditions. > so what it is all about? > > also the website says the ref design uses Spartan III not IIE ? > > antti > www.openchip.org > > "Torsten Lauter" <tlau@infotech.tu-chemnitz.de> wrote in message > news:c1d6q4$blt$1@anderson.hrz.tu-chemnitz.de... > > Free PCI-bridge in VHDL for Spartan-IIE > > > > Somebody knows the implementation of > > http://www.infotech.tu-chemnitz.de/~tlau/pci_bridge > > > > Regards. > > __________________________________________________________________ Torsten > > Lauter ICQ#: 14492119 Current ICQ status: + More ways to contact me > > __________________________________________________________________ > > > >
Hi,

Mine isn't going to be free, but . . . I am considering releasing a PCI
IP core I have been working on for quite some time, and I am trying to
gauge the demand out there for a commercial-grade PCI IP core for
personal users.
However, the PCI IP core itself probably won't be available for another
three months at the earliest (I still need to fix some minor problems,
and setup the infrastructure before the release.).
The price I am thinking of charging for my PCI IP core is only $100
(USD) as long as the licensee meets the following conditions.

* The licensee resides within the United States (Don't have to be a US
citizen.).
* The licensee Will agree that the PCI IP core will be used only for
non-commercial, non-profit, non-academic research, and personal
purposes.
* The licensee is will agree, sign, and mail back to a license agreement
form I will provide.
* The licensee will pay for the PCI IP core license through an online
payment source like PayPal.



This is what my PCI IP core looks like:

* PCI Local Bus Revision 2.2 compliant.
* Burst initiator/target access support.
* 6 Base Address Register (BAR) and Expansion ROM BAR support.
* Meets 33MHz PCI timings with Spartan-II-5 (Currently, no 66MHz PCI
support with any device due to setup time issues . . .).
* General purpose PCI testbench comes with a PCI arbiter, PCI host
bridge emulator, and PCI target device to allow the user to quickly
debug their design.
* The PCI IP core supplied in NGO netlist format (Xilinx's proprietary
netlist format.).
* Nominally supports Xilinx Virtex, Spartan-II, or newer FPGAs.
* Constraint file supplied for Spartan-II PQ208 and FG456 package,
Virtex-E XCV300E BG432 package, Insight Electronics Spartan-II 150 PCI
card, and Spartan-II 200 PCI card.
* Comes with three reference designs (Two similar target only designs
and one target/initiator design.).
* Fully supports Verilog (Reference designs and the PCI testbench are
written in Verilog.).
* Limited VHDL support (No reference designs and PCI testbench. Might do
VHDL porting of reference designs and PCI testbench someday, but I won't
guarantee that.).
* Supports ISE WebPACK 3.2 or later (The use of ISE WebPACK 5.1 or later
is strongly recommended.).
* Should work with paid version (non-WebPACK) ISE software, but hasn't
been tested.
* Free Xilinx ISE WebPACK and ModelSim XE-Starter can be used to
simulate, synthesize, place & route, and generate a bitstream file.
* Should work with non-XST synthesis tools, but hasn't been tested.


        The PCI IP core will also be available for commercial licensees
in NGO netlist format or as Verilog RTL code, but they will cost
considerably more than $100 (Especially the Verilog RTL license.).
The motivation behind this $100 license is to allow hobbyists to build
their own PCI device for about $500 ($275 for Insight Electronics
Spartan-II 200 PCI card with a parallel port JTAG cable, $100 for the
PCI IP core license, $100 for a printed copy of PCI specification from
PCI-SIG, and other miscellaneous costs like shipping cost and sales
tax.) without having them to spend too much time designing their own PCI
interface.
My guess is that there are probably a few hundred people in the United
States who will rather license a PCI IP core with testbench for $100
than to do their own or use Opencores.org PCI IP core.
I believe this PCI IP core is a great learning vehicle for those who
want to learn programmable logic or Verilog, or for use in a student
project (The student can concentrate on backend logic rather than the
PCI bus.).
Let me know if anyone is interesting in this product.


Kevin Brace




Torsten Lauter wrote:
> > Free PCI-bridge in VHDL for Spartan-IIE > > Somebody knows the implementation of > http://www.infotech.tu-chemnitz.de/~tlau/pci_bridge > > Regards. > __________________________________________________________________ Torsten > Lauter ICQ#: 14492119 Current ICQ status: + More ways to contact me > __________________________________________________________________
"Kevin Brace" <kev0inb1rac2e@m3ail.c4om> wrote in message
news:c1f3ac$lrc$1@newsreader.mailgate.org...
> > * The licensee resides within the United States (Don't have to be a US > citizen.).
How can you possibly justify this restriction? You get a chance to explain yourself before the rants arrive, but it'd better be *very* good. David Brown Norway.
Hello

You must go on the website and must fill out the form.
You get the data per email then.
I have gotten the data per email and nothing pays.

Regards

Torsten Lauter

"Antti Lukats" <antti@case2000.com> schrieb im Newsbeitrag
news:c1di1m$vqs$00$1@news.t-online.com...
> Torsten, > > what do you mean by "Free" ? > on the link there is notice > > "if interested please contact using a form" - there is no reference to any > form or download location or conditions. > so what it is all about? > > also the website says the ref design uses Spartan III not IIE ? > > antti > www.openchip.org > > > "Torsten Lauter" <tlau@infotech.tu-chemnitz.de> wrote in message > news:c1d6q4$blt$1@anderson.hrz.tu-chemnitz.de... > > Free PCI-bridge in VHDL for Spartan-IIE > > > > Somebody knows the implementation of > > http://www.infotech.tu-chemnitz.de/~tlau/pci_bridge > > > > Regards. > > __________________________________________________________________
Torsten
> > Lauter ICQ#: 14492119 Current ICQ status: + More ways to contact me > > __________________________________________________________________ > > > > > >
Dear Antti,

the code is provided free of charge via email.
However, no support or design guidance is guaranteed. 
Its use is at your own risk.
So, simply fill in the form and expect a brief email conversation.
( http://www.infotech.tu-chemnitz.de/~tlau/pci_bridge/kontakt.php3 )


Cheers,
Thomas
-- 
http://www.infotech.tu-chemnitz.de/~knoll/

"Antti Lukats" <antti@case2000.com> wrote in message news:<c1di1m$vqs$00$1@news.t-online.com>...
> Torsten, > > what do you mean by "Free" ? > on the link there is notice > > "if interested please contact using a form" - there is no reference to any > form or download location or conditions. > so what it is all about? > > also the website says the ref design uses Spartan III not IIE ? > > antti > www.openchip.org >
Kevin Brace <kev0inb1rac2e@m3ail.c4om> wrote:
> Hi, > > Mine isn't going to be free, but . . . I am considering releasing a PCI > IP core I have been working on for quite some time, and I am trying to > gauge the demand out there for a commercial-grade PCI IP core for > personal users. > However, the PCI IP core itself probably won't be available for another > three months at the earliest (I still need to fix some minor problems, > and setup the infrastructure before the release.). > The price I am thinking of charging for my PCI IP core is only $100 > (USD) as long as the licensee meets the following conditions. > > * The licensee resides within the United States (Don't have to be a US > citizen.). > * The licensee Will agree that the PCI IP core will be used only for > non-commercial, non-profit, non-academic research, and personal > purposes. > * The licensee is will agree, sign, and mail back to a license agreement > form I will provide. > * The licensee will pay for the PCI IP core license through an online > payment source like PayPal. >
Rather heavy-handed set of restrictions, don't you think? -- Sander +++ Out of cheese error +++
Hello

There is also an english version of the description and contact form
page available by now.
The title is "Free VHDL implementation of a PCI Brigde using Xilinx
Spartan-IIE FPGA" for the design description page and
"Design reuse of the free VHDL PCI Bridge Core" for the actual contact
form.

There is no direct download, but the source will be sent as
attachement during a short email exchange.

http://www.infotech.tu-chemnitz.de/~knoll/vhdl_pci_bridge/

http://www.infotech.tu-chemnitz.de/~knoll/vhdl_pci_bridge/kontakt.php

Cheers,
Thomas
--
http://www.infotech.tu-chemnitz.de/~knoll/
Sander Vesik wrote:
> > > Rather heavy-handed set of restrictions, don't you think? > > -- > Sander > > +++ Out of cheese error +++
That's because the licensee is paying only $100. If the licensee is willing to pay much more than that, that person can use my PCI IP core in a commercial project. Kevin Brace