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EDK frequency problem

Started by fmostafa September 4, 2008
hi every body,

Iam using EDK 9.2 in a small project for the uart  , and i started the
project with 100 mhz for the processor and 50 mhz for buses , and i
want to change the frequency for the buses to 66 mhz , i did this
before for 33 mhz , but in the case of 66 mhz nothing work, all i did
i change the C_CLKDV_DIVIDE  to 1.5 instead of 2 and the uart
frequency to 66666667 instead of 50000000
and the  c_plb_clk_period_ps to 14999 instead of 20000 , is there
anything else i have to change

thanks
FATMA
fmostafa wrote:

> is there > anything else i have to change
Since it doesn't work, the answer is yes. I would check the static timing for Fmax > 66MHz as a start. -- Mike Treseler