Quartus II compile speedup with New Quad Core Intel machine (compared with old dual XEON workstation)

I recently built a screaming fast machine for doing my FPGA
simulations and compiles.
I just ran a design compile for purposes of comparison on my new Core2
Extreme Quad  based machine
and my old dual processor Xeon machine.

----------------------------------------------------------------------------------------
Here are the system specs for old machine:
2 Intel Xeon CPU model 4, stepping 3 at 3.2 GHz
4GB DDR PC2700
FSB speed 800 MHz.
The motherboard is a  Supermicro X6DAT-G
------------------------------------------------------------------------------------------
Here are the system specs for the new machine:
Intel Core2 Extreme CPU QX9770 @3.2 GHz (quad core)
OCZ Platinum 4GB (2 x 2GB) 240-Pin DDR3 SDRAM DDR3 2000 (PC3 16000)
Dual Channel
FSB speed 1600 MHz.
The motherboard is a  ASUS P5E3 PREMIUM/WIFI-AP @n LGA 775

The benchmark I used is a project that I am working on that utilizes
most
of the memory and LEs on a stratix I 60K LE device.

Quartus took about 33 min to finish the compile on the older machine
The new machine took 12 min to finish.

I was not expecting a 3X speedup!
I guess main memory speed is the major bottleneck for compilation.

On Sep 11, 5:03=A0pm, wallge <wal...@gmail.com> wrote:
> I recently built a screaming fast machine for doing my FPGA
> simulations and compiles.
> I just ran a design compile for purposes of comparison on my new Core2
> Extreme Quad =A0based machine
> and my old dual processor Xeon machine.
>
> -------------------------------------------------------------------------=
---------------
> Here are the system specs for old machine:
> 2 Intel Xeon CPU model 4, stepping 3 at 3.2 GHz
> 4GB DDR PC2700
> FSB speed 800 MHz.
> The motherboard is a =A0Supermicro X6DAT-G
> -------------------------------------------------------------------------=
-----------------
> Here are the system specs for the new machine:
> Intel Core2 Extreme CPU QX9770 @3.2 GHz (quad core)
> OCZ Platinum 4GB (2 x 2GB) 240-Pin DDR3 SDRAM DDR3 2000 (PC3 16000)
> Dual Channel
> FSB speed 1600 MHz.
> The motherboard is a =A0ASUS P5E3 PREMIUM/WIFI-AP @n LGA 775
>
> ThebenchmarkI used is a project that I am working on that utilizes
> most
> of the memory and LEs on a stratix I 60K LE device.
>
> Quartus took about 33 min to finish the compile on the older machine
> The new machine took 12 min to finish.
>
> I was not expecting a 3X speedup!
> I guess main memory speed is the major bottleneck for compilation.

Wow, that's quite an impressive speed-up. I wish I could convince my
company to buy a beast like that. My current design takes about 45
minutes for the PAR, on a 3.0 GHz Core 2 Duo.

-Patrick

On 12 Sep, 13:27, Patrick Dubois <prdub...@gmail.com> wrote:
> On Sep 11, 5:03=A0pm, wallge <wal...@gmail.com> wrote:
>
>
>
>
>
> > I recently built a screaming fast machine for doing my FPGA
> > simulations and compiles.
> > I just ran a design compile for purposes of comparison on my new Core2
> > Extreme Quad =A0based machine
> > and my old dual processor Xeon machine.
>
> > -----------------------------------------------------------------------=
----=AD-------------
> > Here are the system specs for old machine:
> > 2 Intel Xeon CPU model 4, stepping 3 at 3.2 GHz
> > 4GB DDR PC2700
> > FSB speed 800 MHz.
> > The motherboard is a =A0Supermicro X6DAT-G
> > -----------------------------------------------------------------------=
----=AD---------------
> > Here are the system specs for the new machine:
> > Intel Core2 Extreme CPU QX9770 @3.2 GHz (quad core)
> > OCZ Platinum 4GB (2 x 2GB) 240-Pin DDR3 SDRAM DDR3 2000 (PC3 16000)
> > Dual Channel
> > FSB speed 1600 MHz.
> > The motherboard is a =A0ASUS P5E3 PREMIUM/WIFI-AP @n LGA 775
>
> > ThebenchmarkI used is a project that I am working on that utilizes
> > most
> > of the memory and LEs on a stratix I 60K LE device.
>
> > Quartus took about 33 min to finish the compile on the older machine
> > The new machine took 12 min to finish.
>
> > I was not expecting a 3X speedup!
> > I guess main memory speed is the major bottleneck for compilation.
>
> Wow, that's quite an impressive speed-up. I wish I could convince my
> company to buy a beast like that. My current design takes about 45
> minutes for the PAR, on a 3.0 GHz Core 2 Duo.

Show them the numbers to illustrate how much more productive you could
be.

No doubt your time is much more expensive than a new PC.

Jon

>Here are the system specs for old machine:
>2 Intel Xeon CPU model 4, stepping 3 at 3.2 GHz
>4GB DDR PC2700
>FSB speed 800 MHz.
>The motherboard is a  Supermicro X6DAT-G

>Here are the system specs for the new machine:
>Intel Core2 Extreme CPU QX9770 @3.2 GHz (quad core)
>OCZ Platinum 4GB (2 x 2GB) 240-Pin DDR3 SDRAM DDR3 2000 (PC3 16000)
>Dual Channel
>FSB speed 1600 MHz.
>The motherboard is a  ASUS P5E3 PREMIUM/WIFI-AP @n LGA 775

Computer "old":
  3.2 GHz         2 MB cache
   2700 MB/s
  FSB 800 MHz
  Processing time: 33 minutes

Computer "new":
  3.2 GHz         2x6 MB L2
  16000 MB/s     dual channel => 25600 MB/s
  FSB 1600 MHz
  Processing time: 12 minutes

Considering the data I think that mainly the onchip cache is responsible and
the fact that the cpu<->memory bandwidth is increased by a factor of 3.2x

The current software doesn't give any advantage of having multiple cpus asfaik.

I think you could possible improve the speed by getting a cpu with even larger
onchip cache. And maybe 1 GHz faster clock. An more efficient OS can also help.

>> Wow, that's quite an impressive speed-up. I wish I could convince my
>> company to buy a beast like that. My current design takes about 45
>> minutes for the PAR, on a 3.0 GHz Core 2 Duo.

>Show them the numbers to illustrate how much more productive you could
>be.

>No doubt your time is much more expensive than a new PC.

Let's not forget that the change->process->upload->test cycle is repeated many
times throughout a day. Multiplied by the sallary. And that deadlines may
be reached faster it should be a no brainer.

On Sep 12, 10:02=A0am, sky46...@trline4.org wrote:
> >Here are the system specs for old machine:
> >2 Intel Xeon CPU model 4, stepping 3 at 3.2 GHz
> >4GB DDR PC2700
> >FSB speed 800 MHz.
> >The motherboard is a =A0Supermicro X6DAT-G
> >Here are the system specs for the new machine:
> >Intel Core2 Extreme CPU QX9770 @3.2 GHz (quad core)
> >OCZ Platinum 4GB (2 x 2GB) 240-Pin DDR3 SDRAM DDR3 2000 (PC3 16000)
> >Dual Channel
> >FSB speed 1600 MHz.
> >The motherboard is a =A0ASUS P5E3 PREMIUM/WIFI-AP @n LGA 775
>
> Computer "old":
> =A0 3.2 GHz =A0 =A0 =A0 =A0 2 MB cache
> =A0 =A02700 MB/s
> =A0 FSB 800 MHz
> =A0 Processing time: 33 minutes
>
> Computer "new":
> =A0 3.2 GHz =A0 =A0 =A0 =A0 2x6 MB L2
> =A0 16000 MB/s =A0 =A0 dual channel =3D> 25600 MB/s
> =A0 FSB 1600 MHz
> =A0 Processing time: 12 minutes
>
> Considering the data I think that mainly the onchip cache is responsible =
and
> the fact that the cpu<->memory bandwidth is increased by a factor of 3.2x
>
> The current software doesn't give any advantage of having multiple cpus a=
sfaik.
>
> I think you could possible improve the speed by getting a cpu with even l=
arger
> onchip cache. And maybe 1 GHz faster clock. An more efficient OS can also=
 help.

Apparently (I think I actually read it on comp.arch.fpga from an
Altera Rep.) using additional CPUs adds
a 10~15% speedup in Quartus.I guess Altera is gradually parallelizing
both synthesis and P&R
algorithms.

On a separate note, the machine only cost me ~ $2700 to build.
The most expensive part was the CPU at around $1500, and next was the
mother board
and memory both coming in at close to $400 as I recall. Most of the
other parts
(HDD, DVDR, Graphics card, case, CPU fan) were at or around $100.
I didn't spend lots on the GPU since it does not contribute to fast
compiles.

Also the old machine ran windows XP, the new one runs Vista (I had a
free upgrade to it).
We don't run linux because the licenses are more expensive and because
our other tools
are windows based.

On Sep 12, 10:12=A0am, sky46...@trline4.org wrote:
> >> Wow, that's quite an impressive speed-up. I wish I could convince my
> >> company to buy a beast like that. My current design takes about 45
> >> minutes for the PAR, on a 3.0 GHz Core 2 Duo.
> >Show them the numbers to illustrate how much more productive you could
> >be.
> >No doubt your time is much more expensive than a new PC.
>
> Let's not forget that the change->process->upload->test cycle is repeated=
 many
> times throughout a day. Multiplied by the sallary. And that deadlines may
> be reached faster it should be a no brainer.

If that cycle is being repeated many times throughout the day, you
could probably benefit much more with a process change that involves
more extensive simulation and only a single build...your productivity
will likely increase dramatically.

KJ

> Wow, that's quite an impressive speed-up. I wish I could convince my
> company to buy a beast like that. My current design takes about 45
> minutes for the PAR, on a 3.0 GHz Core 2 Duo.
>
> -Patrick

Why?1?  Your machine is already near the top of the heap.

Even if it's the oldest 3 GHz Core 2 Duo (E6850, or X6800), it's
only 10-20% slower than the top-of-the-line E8600 (3.33GHz.)

Aside from the larger L2-cache (6MB vs 4MB) on the E8xxx
series, you're not going to see the leapfrog improvement that
the original-poster did -- the Pentium4 architecture suffered
pretty badly when executing 'random-code' (compile-tasks.) 

On Sep 13, 12:32=A0am, "arko" <a...@winnet.com> wrote:
> > Wow, that's quite an impressive speed-up. I wish I could convince my
> > company to buy a beast like that. My current design takes about 45
> > minutes for the PAR, on a 3.0 GHz Core 2 Duo.
>
> > -Patrick
>
> Why?1? =A0Your machine is already near the top of the heap.
>
> Even if it's the oldest 3 GHz Core 2 Duo (E6850, or X6800), it's
> only 10-20% slower than the top-of-the-line E8600 (3.33GHz.)
>
> Aside from the larger L2-cache (6MB vs 4MB) on the E8xxx
> series, you're not going to see the leapfrog improvement that
> the original-poster did -- the Pentium4 architecture suffered
> pretty badly when executing 'random-code' (compile-tasks.)

You're probably right. I can't really complain, after many years I
finally was able to convince them that FPGA design really is computer
intensive and requires a powerful machine (this was already known for
mechanical CAD but FPGA design is new at my company). I got my current
computer about a year ago and I got the most powerful processor back
then. I wish I could get a 3X speed-up but that's probably many years
away, unless the PAR process starts taking advantage of multi-CPU
cores.

KJ is right however that more simulation should be done upfront
instead of many build cycles.

-Patrick

On Sep 12, 10:54=A0am, wallge <wal...@gmail.com> wrote:
> On Sep 12, 10:02=A0am, sky46...@trline4.org wrote:
>
>
>
> > >Here are the system specs for old machine:
> > >2 Intel Xeon CPU model 4, stepping 3 at 3.2 GHz
> > >4GB DDR PC2700
> > >FSB speed 800 MHz.
> > >The motherboard is a =A0Supermicro X6DAT-G
> > >Here are the system specs for the new machine:
> > >Intel Core2 Extreme CPU QX9770 @3.2 GHz (quad core)
> > >OCZ Platinum 4GB (2 x 2GB) 240-Pin DDR3 SDRAM DDR3 2000 (PC3 16000)
> > >Dual Channel
> > >FSB speed 1600 MHz.
> > >The motherboard is a =A0ASUS P5E3 PREMIUM/WIFI-AP @n LGA 775
>
> > Computer "old":
> > =A0 3.2 GHz =A0 =A0 =A0 =A0 2 MB cache
> > =A0 =A02700 MB/s
> > =A0 FSB 800 MHz
> > =A0 Processing time: 33 minutes
>
> > Computer "new":
> > =A0 3.2 GHz =A0 =A0 =A0 =A0 2x6 MB L2
> > =A0 16000 MB/s =A0 =A0 dual channel =3D> 25600 MB/s
> > =A0 FSB 1600 MHz
> > =A0 Processing time: 12 minutes
>
> > Considering the data I think that mainly the onchip cache is responsibl=
e and
> > the fact that the cpu<->memory bandwidth is increased by a factor of 3.=
2x
>
> > The current software doesn't give any advantage of having multiple cpus=
 asfaik.
>
> > I think you could possible improve the speed by getting a cpu with even=
 larger
> > onchip cache. And maybe 1 GHz faster clock. An more efficient OS can al=
so help.
>
> Apparently (I think I actually read it on comp.arch.fpga from an
> Altera Rep.) using additional CPUs adds
> a 10~15% speedup in Quartus.I guess Altera is gradually parallelizing
> both synthesis and P&R
> algorithms.
>
> On a separate note, the machine only cost me ~ $2700 to build.
> The most expensive part was the CPU at around $1500, and next was the
> mother board
> and memory both coming in at close to $400 as I recall. Most of the
> other parts
> (HDD, DVDR, Graphics card, case, CPU fan) were at or around $100.
> I didn't spend lots on the GPU since it does not contribute to fast
> compiles.
>
> Also the old machine ran windows XP, the new one runs Vista (I had a
> free upgrade to it).
> We don't run linux because the licenses are more expensive and because
> our other tools
> are windows based.

There are any number of reports that Vista will make your software run
significantly slower than XP... or better yet, Win2k.  If you could
manage it, I would love to see this measured for FPGA work.

Rick