Xilinx FFT core configured in natural order

Structural simulation of FFT core reveal the frequency to bin (XK_IDX)
mapping are bit reversed when the FFT core is configured to output in
streaming, natural order. Real time swapping of the frequency needs
FIFO of 2^N deep. Can anyone help me to implement a more optimized
freq swap method.

>Structural simulation of FFT core reveal the frequency to bin (XK_IDX)
>mapping are bit reversed when the FFT core is configured to output in
>streaming, natural order. Real time swapping of the frequency needs
>FIFO of 2^N deep. Can anyone help me to implement a more optimized
>freq swap method.
>

FFTs are - as a result of the nature of the Cooley-Tukey algorithm -
either natural-in+reversed-out or reversed-in+natural-out. To design an
architecture that does natural-in+natural-out without a buffer memory is
distinctly non-trivial. Try asking on a DSP newsgroup...