Random Mask Generation on FPGAs

Hi

I would like to implement an encryption algorithm on my FPGA. The 
problem that I face here is that I need to generate each time I run
the algorithms 6 different random masks with 32-bits each. So I am 
wondering if anyone has a suggestion how to do that best? Until now I 
used LFSR to generate some single bits randomly, however now I should 
have in some way "independed" masks for 50.000 different runs.

Thanks!
Klaus

Klaus Niedermayer wrote:
> Hi
> 
> I would like to implement an encryption algorithm on my FPGA. The 
> problem that I face here is that I need to generate each time I run
> the algorithms 6 different random masks with 32-bits each. So I am 
> wondering if anyone has a suggestion how to do that best? Until now I 
> used LFSR to generate some single bits randomly, however now I should 
> have in some way "independed" masks for 50.000 different runs.
> 
> Thanks!
> Klaus


Hi,

what about using those few random bits You currently create for driving 
a chain of registers and adders used in pseudo noise sequences?

Depends on how "random" Your random values have to be ...

Regards,

Lorenz

> what about using those few random bits You currently create for driving 
> a chain of registers and adders used in pseudo noise sequences?

Well, the problem is that the random bits generated by a LFSR will be 
the same after a certain amout of time. And I should really have around 
50.000 independed values from each other!

> Well, the problem is that the random bits generated by a LFSR will be
> the same after a certain amout of time. And I should really have around
> 50.000 independed values from each other!

You can seed a streamcipher from the LFSR, and  then use the
streamcipher output as your 50000 independant values.

On Sep 17, 5:38=A0am, Klaus Niedermayer <Klaus_Niederma...@yahoo.com>
wrote:
> > what about using those few random bits You currently create for driving
> > a chain of registers and adders used in pseudo noise sequences?
>
> Well, the problem is that the random bits generated by a LFSR will be
> the same after a certain amout of time. And I should really have around
> 50.000 independed values from each other!

50 000 is really a small number, typical for a 16-bit LFSR. Nothing
stops you from making the LFSR much longer, like 40 to 100 bits, which
pushes the repetition out millions and trillions of times.
Peter Alfke

Klaus Niedermayer wrote:
> Hi
> 
> I would like to implement an encryption algorithm on my FPGA. The 
> problem that I face here is that I need to generate each time I run
> the algorithms 6 different random masks with 32-bits each. So I am 
> wondering if anyone has a suggestion how to do that best? Until now I 
> used LFSR to generate some single bits randomly, however now I should 
> have in some way "independed" masks for 50.000 different runs.
> 
> Thanks!
> Klaus

The big question is: just random or secret?

If you need IVs (initialization vectors for some encryption modes)
then a long enough LFSR or any other pseudo-random number generator
should be OK.
On the other hand if you need random KEYS that have to be truly random,
no matter what algorithm you use, you will need a source of random
bits with enough entropy. That's why many programs ask to randomly type
on the keyboard or move a mouse when generating random keys.

Klaus Niedermayer wrote:
> Hi
> 
> I would like to implement an encryption algorithm on my FPGA. The 
> problem that I face here is that I need to generate each time I run
> the algorithms 6 different random masks with 32-bits each. So I am 
> wondering if anyone has a suggestion how to do that best? Until now I 
> used LFSR to generate some single bits randomly, however now I should 
> have in some way "independed" masks for 50.000 different runs.

  I saw recent news of a startup offering IP, but that's unlikely to be
on real FPGA silicon yet :)

  All you can get on a FPGA is quasi-random, but you can push the
'quasi' to make attack harder.
  With a simple LFSR, they follow the same pattern from reset.

  However, you may be able to hide that, with for example, seeding from 
SRAM, and using a Pre-INC into a block of SRAM
- the sram contents will change after long power offs, and insufficent 
cycle power which tend to preserve RAM values, will also preserve the 
counter value, and so tend to fetch another ram location.
  You can also build Ring oscillators, to get more variables into
the process.
- ie you add lots of layers, and in unexpected ways.

-jg

Jim Granville wrote:
> Klaus Niedermayer wrote:
>> Hi
>>
>> I would like to implement an encryption algorithm on my FPGA. The 
>> problem that I face here is that I need to generate each time I run
>> the algorithms 6 different random masks with 32-bits each. So I am 
>> wondering if anyone has a suggestion how to do that best? Until now I 
>> used LFSR to generate some single bits randomly, however now I should 
>> have in some way "independed" masks for 50.000 different runs.
> 
>  I saw recent news of a startup offering IP, but that's unlikely to be
> on real FPGA silicon yet :)
> 
>  All you can get on a FPGA is quasi-random, but you can push the
> 'quasi' to make attack harder.

Well not exactly, I'd say that if some microphone amplifier etc. is 
connected to the FPGA in some way (and no microphone is connected) the 
LSB of samples aquired (assuming some reasonable temperature-range) will 
be quite random (and equally distributed).
That could be quite a good source for initiallly feeding some shifting 
registers...

Regards,

Lorenz

>50 000 is really a small number, typical for a 16-bit LFSR. Nothing
>stops you from making the LFSR much longer, like 40 to 100 bits, which
>pushes the repetition out millions and trillions of times.
>Peter Alfke

Try the Mersenne Twistor for a really long LFSR-type sequence.

Note that such pseudo-randum number generators are not, in fact, random. 
And not suitable for use in cryptography.

-- 
	mac the na�f

On Sep 17, 5:23=A0pm, Alex Freed <alex_n...@mirrow.com> wrote:

>
> The big question is: just random or secret?
>

Trying not to get too off topic, but has anyone tried the R300-SMT
from protego.se?  http://www.protego.se/r300a.htm
Its a hardware random number generator, with an SPI interface, so it
should be relatively straightforward to use with an FPGA.

-William Gibb