wishbone interface

I ma trying to make my first design (UART) wishbone compliant and
looked at wishbone specification and several examples with source code
on the net. Though I understand there are some restrictions on
multiplexing of address and data bus, tri-state bus etc.. in many
cases I hardly see any additional logic in the wishhbone compliant
designs other than naming the external signals as per the wishbone
standard and some additional documentation like wishbone datasheet
etc.. Is that all about Wishbone compliance?

TIA
mkr

mkr wrote:
> I ma trying to make my first design (UART) wishbone compliant and
> looked at wishbone specification and several examples with source code
> on the net. Though I understand there are some restrictions on
> multiplexing of address and data bus, tri-state bus etc.. in many
> cases I hardly see any additional logic in the wishhbone compliant
> designs other than naming the external signals as per the wishbone
> standard and some additional documentation like wishbone datasheet
> etc.. Is that all about Wishbone compliance?
> 

Hi,

I suggest you take a closer look at the "Simple 8-bit SLAVE Output Port" 
example in the Tutorial appendix of the WISHBONE specification. For 
simple slave modules, that's pretty much all there is to it.

HTH

RG

RG, thanks.

I looked at the 8-bit slave o/p port and 16X8 bit slave memory given
in the appendix of the spec. The 16X8 bit slave memory  has only one
AND gate besides the required two 16X4 bit SRAM modules. Even if you
don't need it to make wb compliant you pretty much need to have
everything (data in , data out , address in, Clock in , ack , write
enable  and associated logic) and design it the same way whther you
want it wb compatible or not. The only obvious difference is naming of
interface signals as per wb spec. I know I am missing something but
not able to figure out.

I designed a simple UART as my first project and trying it to make it
wb compliant.  I read the wb spec but I don't see the need for any
changes, to make it wb compliant other than changing the interface
signal names. On the system side UART has clk,_in rst_in, Data in/out,
reg address in and write enable signals and the logic is obvious from
signal names. As far as the interface is concerned I don't find any
difference between my current non wb  UART and the example 16x8 memory
in the spec except the signal names.

I am stuck here and not able to move forward to the next design.

- mkr

On Sep 25, 7:10=A0pm, argee <n...@nope.com> wrote:
> mkr wrote:
> > I ma trying to make my first design (UART) wishbone compliant and
> > looked at wishbone specification and several examples with source code
> > on the net. Though I understand there are some restrictions on
> > multiplexing of address and data bus, tri-state bus etc.. in many
> > cases I hardly see any additional logic in the wishhbone compliant
> > designs other than naming the external signals as per the wishbone
> > standard and some additional documentation like wishbone datasheet
> > etc.. Is that all about Wishbone compliance?
>
> Hi,
>
> I suggest you take a closer look at the "Simple 8-bit SLAVE Output Port"
> example in the Tutorial appendix of the WISHBONE specification. For
> simple slave modules, that's pretty much all there is to it.
>
> HTH
>
> RG

mkr <mahenreddy@gmail.com> writes:

> RG, thanks.
>
> I looked at the 8-bit slave o/p port and 16X8 bit slave memory given
> in the appendix of the spec. The 16X8 bit slave memory  has only one
> AND gate besides the required two 16X4 bit SRAM modules. Even if you
> don't need it to make wb compliant you pretty much need to have
> everything (data in , data out , address in, Clock in , ack , write
> enable  and associated logic) and design it the same way whther you
> want it wb compatible or not. The only obvious difference is naming of
> interface signals as per wb spec. I know I am missing something but
> not able to figure out.
>

I'm not sure you are missing anything.  For simple slaves, it really
is that simple.

Cheers,
Martin

-- 
martin.j.thompson@trw.com 
TRW Conekt - Consultancy in Engineering, Knowledge and Technology
http://www.conekt.net/electronics.html