Forums

Tiny JTAG connector

Started by Eric November 4, 2008
What do "real" engineers do when they want to preserve the ability to
connect a JTAG pod to a device, but board layout/space concerns
prevent the use of the large 14-pin 2mm-pitch dual-row xilinx JTAG
header that's common on all the JTAG Products?

I'm somewhat envisioning a tiny small-pin-count press-to-fit
connector, but I have no idea. Are there any
standards in this area?

Thanks!
   ...Eric
Eric <jonas@mit.edu> wrote:

>What do "real" engineers do when they want to preserve the ability to >connect a JTAG pod to a device, but board layout/space concerns >prevent the use of the large 14-pin 2mm-pitch dual-row xilinx JTAG >header that's common on all the JTAG Products? > >I'm somewhat envisioning a tiny small-pin-count press-to-fit >connector, but I have no idea. Are there any >standards in this area?
Not really. I used a 1.27mm pitch dual row (2x5) header on a product. But it is intended to be used with a parallel port JTAG wiggler so speed (signal integrity) wasn't one of my concerns. -- Programmeren in Almere? E-mail naar nico@nctdevpuntnl (punt=.)
On Tue, 4 Nov 2008 08:31:39 -0800 (PST), Eric <jonas@mit.edu> wrote:

>What do "real" engineers do when they want to preserve the ability to >connect a JTAG pod to a device, but board layout/space concerns >prevent the use of the large 14-pin 2mm-pitch dual-row xilinx JTAG >header that's common on all the JTAG Products? > >I'm somewhat envisioning a tiny small-pin-count press-to-fit >connector, but I have no idea. Are there any >standards in this area? > >Thanks! > ...Eric
The Xilinx/Digilent boards use a 6-pin, single row, 0.1" pitch connector. That's probably too big for your board, though. -Dave Pollum
"Nico Coesel" <nico@puntnl.niks> wrote in message 
news:49107e8c.511125379@news.planet.nl...
> Eric <jonas@mit.edu> wrote: > >>What do "real" engineers do when they want to preserve the ability to >>connect a JTAG pod to a device, but board layout/space concerns >>prevent the use of the large 14-pin 2mm-pitch dual-row xilinx JTAG >>header that's common on all the JTAG Products? >> >>I'm somewhat envisioning a tiny small-pin-count press-to-fit >>connector, but I have no idea. Are there any >>standards in this area? > > Not really. I used a 1.27mm pitch dual row (2x5) header on a product. > But it is intended to be used with a parallel port JTAG wiggler so > speed (signal integrity) wasn't one of my concerns. >
Signal integrity is still important on TCK. If not treated properly it can, and will, bite your butt. Bob -- == All google group posts are automatically deleted due to spam ==
Eric wrote:
> What do "real" engineers do when they want to preserve the ability to > connect a JTAG pod to a device, but board layout/space concerns > prevent the use of the large 14-pin 2mm-pitch dual-row xilinx JTAG > header that's common on all the JTAG Products?
You only need 6 pins. I actually use 8, 3 grounds, VCC, and TMS, TCLK, DIN and DOUT. Jon
On Nov 4, 6:22=A0pm, Jon Elson <jmel...@wustl.edu> wrote:
> Eric wrote: > > What do "real" engineers do when they want to preserve the ability to > > connect a JTAG pod to a device, but board layout/space concerns > > prevent the use of the large 14-pin 2mm-pitch dual-row xilinx JTAG > > header that's common on all the JTAG Products? > > You only need 6 pins. =A0I actually use 8, 3 grounds, VCC, and TMS, TCLK, > DIN and DOUT. > > Jon
Real-world products usually already have some connectors on them. One approach is to use spare pins of an I/O connector or set up a dual-use for some pins. I have done this with Cardbus and Express- Card products, since the board will be in a sealed can when complete. Another approach is to just leave a few pads with no connector and build a fixture with pogo pins for production programming. Not very useful in the field, however. I have also used 1.27mm (.050") headers from Samtec on some products, but you will have limited access to wiring these unless you want to also design a mating card. For production this might not be a pad idea. Tiny wires in tiny sockets tend to break when used regularly. Regards, Gabor
Eric wrote:
> What do "real" engineers do when they want to preserve the ability to > connect a JTAG pod to a device, but board layout/space concerns > prevent the use of the large 14-pin 2mm-pitch dual-row xilinx JTAG > header that's common on all the JTAG Products? > > I'm somewhat envisioning a tiny small-pin-count press-to-fit > connector, but I have no idea. Are there any > standards in this area? > > Thanks! > ...Eric
In the past we've designed in a small footprint connector; and created an adapter harness to go between the programming pod and the new board connector. I don't believe there is a standard on the connector--choose what ever makes sense for you design. I just used a 1.5mm JST connector on a production board I'm designing. The FPGA mfg's have to choose something that is robust (can handle many insertions/extractions) as the pod could be used quite frequently. Rob
http://en.wikipedia.org/wiki/JTAG#JTAG_Adapter_Hardware 


Eric

Acouple of approaches for you to consider depending on whether the
connector cost is important and whether you have high volume etc..

For high volume it can be worth considering a set of pads, through
hole, or flat surface on a regular grid like 2.54mm pitch. You then
need a companion board or veroboard to hold a set of sprung pins that
make contact and you adapt to the 2x7 connector. You also need
mechanical arrangements to make this reliable.

You could also adopt our 2x6 format on 1.27mm and buy one of our
adaptors that converts the 2x6 to two standard 2x7 2mm connectors. You
can see this connector on our Craignell DIP FPGA modules
http://www.enterpoint.co.uk/component_replacements/craignell.html or
the newly launched Hollybush2 http://www.enterpoint.co.uk/oem_industrial/ho=
llybush2.html.
You can see the adaptor in our Craignell manual
http://www.enterpoint.co.uk/component_replacements/Craignell_User_Manual_Is=
sue_1_01.pdf.
The adaptors are available for GBP=A310 or US$17. The adaptor supports
simultaneous independent SPI and JTAG if you have reason to do that.

John Adair
Enterpoint Ltd.


On 4 Nov, 16:31, Eric <jo...@mit.edu> wrote:
> What do "real" engineers do when they want to preserve the ability to > connect a JTAG pod to a device, but board layout/space concerns > prevent the use of the large 14-pin 2mm-pitch dual-row xilinx JTAG > header that's common on all the JTAG Products? > > I'm somewhat envisioning a tiny small-pin-count press-to-fit > connector, but I have no idea. Are there any > standards in this area? > > Thanks! > =A0 =A0...Eric