FPGARelated.com
Forums

Tilera multicore replaces FPGA?

Started by mentari November 7, 2008
What are your views on http://scratchpad.wikia.com/wiki/TileraMulticore
as a replacement for FPGA's ?

http://www.tilera.com/solutions/digital_baseband.php

The current architecture for base stations fall short of delivering
the performance, the low latency and the flexibility customers need.
To meet the requirements, wireless equipment providers design complex
systems with FPGA, ASIC, DSP and processors with each component
requiring special tools in a customized development environment. This
leads to a long development cycle, sometimes years, before
applications can be productized. Changes in standards also impact
providers because such systems are inflexible-upgrades can be a slow
and expensive process.

What providers seek is an uncomplicated, well-designed, architecture
that yields good performance. Tilera's processors provide a low
latency single solution that integrates many functions seamlessly in a
single processor and uses C/C++ to program their applications with
industry standard tools. The familiar tools enable customers to
preserve their software investments, replace a number of disparate
programming methodologies with one standard programming environment,
and gain the flexibility they need to support evolving protocols and
ever-increasing demands for service
mentari wrote:
> What are your views on http://scratchpad.wikia.com/wiki/TileraMulticore > as a replacement for FPGA's ?
http://groups.google.com/group/comp.arch.fpga/browse_thread/thread/99a7f70929b2f1e2 Last I checked there was little info about price or availability. -Jeff
On 7 Nov, 10:25, mentari <Stephan...@gmail.com> wrote:
> What are your views onhttp://scratchpad.wikia.com/wiki/TileraMulticore > as a replacement for FPGA's ? > > http://www.tilera.com/solutions/digital_baseband.php > > The current architecture for base stations fall short of delivering > the performance, the low latency and the flexibility customers need. > To meet the requirements, wireless equipment providers design complex > systems with FPGA, ASIC, DSP and processors with each component > requiring special tools in a customized development environment. This > leads to a long development cycle, sometimes years, before > applications can be productized. Changes in standards also impact > providers because such systems are inflexible-upgrades can be a slow > and expensive process. > > What providers seek is an uncomplicated, well-designed, architecture > that yields good performance. Tilera's processors provide a low > latency single solution that integrates many functions seamlessly in a > single processor and uses C/C++ to program their applications with > industry standard tools. The familiar tools enable customers to > preserve their software investments, replace a number of disparate > programming methodologies with one standard programming environment, > and gain the flexibility they need to support evolving protocols and > ever-increasing demands for service
XMOS chips are intended to replace FPGAs in many applications, and are available now: http://www.xmos.com Leon
On 7 nov, 05:25, mentari <Stephan...@gmail.com> wrote:
> What are your views onhttp://scratchpad.wikia.com/wiki/TileraMulticore > as a replacement for FPGA's ? > > http://www.tilera.com/solutions/digital_baseband.php > > The current architecture for base stations fall short of delivering > the performance, the low latency and the flexibility customers need. > To meet the requirements, wireless equipment providers design complex > systems with FPGA, ASIC, DSP and processors with each component > requiring special tools in a customized development environment. This > leads to a long development cycle, sometimes years, before > applications can be productized. Changes in standards also impact > providers because such systems are inflexible-upgrades can be a slow > and expensive process. > > What providers seek is an uncomplicated, well-designed, architecture > that yields good performance. Tilera's processors provide a low > latency single solution that integrates many functions seamlessly in a > single processor and uses C/C++ to program their applications with > industry standard tools. The familiar tools enable customers to > preserve their software investments, replace a number of disparate > programming methodologies with one standard programming environment, > and gain the flexibility they need to support evolving protocols and > ever-increasing demands for service
It seems to be similar to XMOS devices. I suppose that it could replace FPGAs in some applications. However, it's still a much coarser architecture than an FPGA. There's still only 64 processing units, while a Virtex-5 can have about 20 000 slices and a couple of PPC processors. In the end, I think that since FPGAs are much more flexible, they have the upper hand. Plus with tools like system generator, AccelDSP and Simulink, low-level HDL coding can be skipped, and the engineer can focus more on applications and less on the "bit- level" of things. Plus I suppose that with a high-capacity FPGA, one could emulate a Tilera-like device with 64 processing units. Maybe the future's there, take the Tilera (or Xmos) concept and implement it in a FPGA. My 2 cents
On 7 nov, 11:01, Leon <leon...@btinternet.com> wrote:
> On 7 Nov, 10:25, mentari <Stephan...@gmail.com> wrote: > > > > > What are your views onhttp://scratchpad.wikia.com/wiki/TileraMulticore > > as a replacement for FPGA's ? > > >http://www.tilera.com/solutions/digital_baseband.php > > > The current architecture for base stations fall short of delivering > > the performance, the low latency and the flexibility customers need. > > To meet the requirements, wireless equipment providers design complex > > systems with FPGA, ASIC, DSP and processors with each component > > requiring special tools in a customized development environment. This > > leads to a long development cycle, sometimes years, before > > applications can be productized. Changes in standards also impact > > providers because such systems are inflexible-upgrades can be a slow > > and expensive process. > > > What providers seek is an uncomplicated, well-designed, architecture > > that yields good performance. Tilera's processors provide a low > > latency single solution that integrates many functions seamlessly in a > > single processor and uses C/C++ to program their applications with > > industry standard tools. The familiar tools enable customers to > > preserve their software investments, replace a number of disparate > > programming methodologies with one standard programming environment, > > and gain the flexibility they need to support evolving protocols and > > ever-increasing demands for service > > XMOS chips are intended to replace FPGAs in many applications, and are > available now: > > http://www.xmos.com > > Leon
So Leon, what's your impression of the xmos devices so far?
On 7 Nov, 16:26, Benjamin Couillard <benjamin.couill...@gmail.com>
wrote:
> On 7 nov, 11:01, Leon <leon...@btinternet.com> wrote: > > > > > On 7 Nov, 10:25, mentari <Stephan...@gmail.com> wrote: > > > > What are your views onhttp://scratchpad.wikia.com/wiki/TileraMulticore > > > as a replacement for FPGA's ? > > > >http://www.tilera.com/solutions/digital_baseband.php > > > > The current architecture for base stations fall short of delivering > > > the performance, the low latency and the flexibility customers need. > > > To meet the requirements, wireless equipment providers design complex > > > systems with FPGA, ASIC, DSP and processors with each component > > > requiring special tools in a customized development environment. This > > > leads to a long development cycle, sometimes years, before > > > applications can be productized. Changes in standards also impact > > > providers because such systems are inflexible-upgrades can be a slow > > > and expensive process. > > > > What providers seek is an uncomplicated, well-designed, architecture > > > that yields good performance. Tilera's processors provide a low > > > latency single solution that integrates many functions seamlessly in a > > > single processor and uses C/C++ to program their applications with > > > industry standard tools. The familiar tools enable customers to > > > preserve their software investments, replace a number of disparate > > > programming methodologies with one standard programming environment, > > > and gain the flexibility they need to support evolving protocols and > > > ever-increasing demands for service > > > XMOS chips are intended to replace FPGAs in many applications, and are > > available now: > > >http://www.xmos.com > > > Leon > > So Leon, what's your impression of the xmos devices so far?
I'm very impressed. The $99 XC-1 kit is very good value, and the (open source) tools are good. The tools have a few bugs, but they aren't serious. I don't think the silicon has any problems. Support is excellent. The chips are made using a conservative 90nm process, when they move to something more advanced they should be able to push the speed up and get more cores on a chip; they have said that they probably won't go over eight cores, though. Leon
On 7 Nov, 16:11, Benjamin Couillard <benjamin.couill...@gmail.com>
wrote:
> On 7 nov, 05:25, mentari <Stephan...@gmail.com> wrote: > > > > > What are your views onhttp://scratchpad.wikia.com/wiki/TileraMulticore > > as a replacement for FPGA's ? > > >http://www.tilera.com/solutions/digital_baseband.php > > > The current architecture for base stations fall short of delivering > > the performance, the low latency and the flexibility customers need. > > To meet the requirements, wireless equipment providers design complex > > systems with FPGA, ASIC, DSP and processors with each component > > requiring special tools in a customized development environment. This > > leads to a long development cycle, sometimes years, before > > applications can be productized. Changes in standards also impact > > providers because such systems are inflexible-upgrades can be a slow > > and expensive process. > > > What providers seek is an uncomplicated, well-designed, architecture > > that yields good performance. Tilera's processors provide a low > > latency single solution that integrates many functions seamlessly in a > > single processor and uses C/C++ to program their applications with > > industry standard tools. The familiar tools enable customers to > > preserve their software investments, replace a number of disparate > > programming methodologies with one standard programming environment, > > and gain the flexibility they need to support evolving protocols and > > ever-increasing demands for service > > It seems to be similar to XMOS devices. I suppose that it could > replace FPGAs in some applications. However, it's still a much coarser > architecture than an FPGA. =A0There's still only 64 processing units, > while a Virtex-5 can have about 20 000 slices and a couple of PPC > processors. In the end, I think that since FPGAs are much more > flexible, they have the upper hand. Plus with tools like system > generator, AccelDSP and Simulink, low-level HDL coding can be skipped, > and the engineer can focus more on applications and less on the "bit- > level" of things. > > Plus I suppose that with a high-capacity FPGA, one could emulate a > Tilera-like device with 64 processing units. Maybe the future's there, > take the Tilera (or Xmos) concept and implement it in a FPGA. > > My 2 cents
They will cost more, be much harder to use, use a lot more power and won't be any faster. Leon
On Nov 7, 6:11 pm, Benjamin Couillard <benjamin.couill...@gmail.com>
wrote:
> It seems to be similar to XMOS devices. I suppose that it could > replace FPGAs in some applications. However, it's still a much coarser > architecture than an FPGA. There's still only 64 processing units, > while a Virtex-5 can have about 20 000 slices and a couple of PPC > processors. In the end, I think that since FPGAs are much more > flexible, they have the upper hand. Plus with tools like system > generator, AccelDSP and Simulink, low-level HDL coding can be skipped, > and the engineer can focus more on applications and less on the "bit- > level" of things.
How complicated is it to do Viterbi, Reed-Solomon on an FPGA for a Wimax transmitter on say 2.4ghz implementing OFDM? My understanding is that that Tilera will provide us with a pure C++ environment and speed up the development cycle which with FPGA could be a few years for a full fledged base station.
On 7 nov, 11:47, Leon <leon...@btinternet.com> wrote:
> On 7 Nov, 16:11, Benjamin Couillard <benjamin.couill...@gmail.com> > wrote: > > > > > On 7 nov, 05:25, mentari <Stephan...@gmail.com> wrote: > > > > What are your views onhttp://scratchpad.wikia.com/wiki/TileraMulticor=
e
> > > as a replacement for FPGA's ? > > > >http://www.tilera.com/solutions/digital_baseband.php > > > > The current architecture for base stations fall short of delivering > > > the performance, the low latency and the flexibility customers need. > > > To meet the requirements, wireless equipment providers design complex > > > systems with FPGA, ASIC, DSP and processors with each component > > > requiring special tools in a customized development environment. This > > > leads to a long development cycle, sometimes years, before > > > applications can be productized. Changes in standards also impact > > > providers because such systems are inflexible-upgrades can be a slow > > > and expensive process. > > > > What providers seek is an uncomplicated, well-designed, architecture > > > that yields good performance. Tilera's processors provide a low > > > latency single solution that integrates many functions seamlessly in =
a
> > > single processor and uses C/C++ to program their applications with > > > industry standard tools. The familiar tools enable customers to > > > preserve their software investments, replace a number of disparate > > > programming methodologies with one standard programming environment, > > > and gain the flexibility they need to support evolving protocols and > > > ever-increasing demands for service > > > It seems to be similar to XMOS devices. I suppose that it could > > replace FPGAs in some applications. However, it's still a much coarser > > architecture than an FPGA. =A0There's still only 64 processing units, > > while a Virtex-5 can have about 20 000 slices and a couple of PPC > > processors. In the end, I think that since FPGAs are much more > > flexible, they have the upper hand. Plus with tools like system > > generator, AccelDSP and Simulink, low-level HDL coding can be skipped, > > and the engineer can focus more on applications and less on the "bit- > > level" of things. > > > Plus I suppose that with a high-capacity FPGA, one could emulate a > > Tilera-like device with 64 processing units. Maybe the future's there, > > take the Tilera (or Xmos) concept and implement it in a FPGA. > > > My 2 cents > > They will cost more, be much harder to use, use a lot more power and > won't be any faster. > > Leon
THe point is not that it will be faster, is that it'll be much more versatile since you won't be stuck with a fixed architecture
On 7 Nov, 18:00, Benjamin Couillard <benjamin.couill...@gmail.com>
wrote:
> On 7 nov, 11:47, Leon <leon...@btinternet.com> wrote: > > > > > On 7 Nov, 16:11, Benjamin Couillard <benjamin.couill...@gmail.com> > > wrote: > > > > On 7 nov, 05:25, mentari <Stephan...@gmail.com> wrote: > > > > > What are your views onhttp://scratchpad.wikia.com/wiki/TileraMultic=
ore
> > > > as a replacement for FPGA's ? > > > > >http://www.tilera.com/solutions/digital_baseband.php > > > > > The current architecture for base stations fall short of delivering > > > > the performance, the low latency and the flexibility customers need=
.
> > > > To meet the requirements, wireless equipment providers design compl=
ex
> > > > systems with FPGA, ASIC, DSP and processors with each component > > > > requiring special tools in a customized development environment. Th=
is
> > > > leads to a long development cycle, sometimes years, before > > > > applications can be productized. Changes in standards also impact > > > > providers because such systems are inflexible-upgrades can be a slo=
w
> > > > and expensive process. > > > > > What providers seek is an uncomplicated, well-designed, architectur=
e
> > > > that yields good performance. Tilera's processors provide a low > > > > latency single solution that integrates many functions seamlessly i=
n a
> > > > single processor and uses C/C++ to program their applications with > > > > industry standard tools. The familiar tools enable customers to > > > > preserve their software investments, replace a number of disparate > > > > programming methodologies with one standard programming environment=
,
> > > > and gain the flexibility they need to support evolving protocols an=
d
> > > > ever-increasing demands for service > > > > It seems to be similar to XMOS devices. I suppose that it could > > > replace FPGAs in some applications. However, it's still a much coarse=
r
> > > architecture than an FPGA. =A0There's still only 64 processing units, > > > while a Virtex-5 can have about 20 000 slices and a couple of PPC > > > processors. In the end, I think that since FPGAs are much more > > > flexible, they have the upper hand. Plus with tools like system > > > generator, AccelDSP and Simulink, low-level HDL coding can be skipped=
,
> > > and the engineer can focus more on applications and less on the "bit- > > > level" of things. > > > > Plus I suppose that with a high-capacity FPGA, one could emulate a > > > Tilera-like device with 64 processing units. Maybe the future's there=
,
> > > take the Tilera (or Xmos) concept and implement it in a FPGA. > > > > My 2 cents > > > They will cost more, be much harder to use, use a lot more power and > > won't be any faster. > > > Leon > > THe point is not that it will be faster, is that it'll be much more > versatile since you won't be stuck with a fixed architecture
You won't have 64k per core, and what about stuff like 100 MHz I/Os, hardware threads switching in one cycle, and 3.2 Gb/s full duplex links between cores? Leon