Setting FSM encoding in VHDL or in UCF for Xilinx

Hello,
I'm designing several Xilinx FPGAs and CPLDs and I was wondering if
there is a way to set the way ISE encodes state machines other than in
project navigator?  I'd like to be able to set it in the VHDL file or
in the UCF.  It's really a quality control problem.  As the project is
touched by many people and as it's upgraded to newer versions of ISE
software the encoding method seems to get changed.  I want to be able
to guarantee that it's set to what I want it to be set to.
Thanks in advance for the help.

Dale

Dale wrote:
> Hello,
> I'm designing several Xilinx FPGAs and CPLDs and I was wondering if
> there is a way to set the way ISE encodes state machines other than in
> project navigator?  I'd like to be able to set it in the VHDL file or
> in the UCF.  It's really a quality control problem.  As the project is
> touched by many people and as it's upgraded to newer versions of ISE
> software the encoding method seems to get changed.  I want to be able
> to guarantee that it's set to what I want it to be set to.
> Thanks in advance for the help.
> 
> Dale

type state_type is (foo, bar, ...);
attribute syn_enum_encoding of state_type: type is "onehot";
signal state: state_type;

-Jeff

On Nov 7, 11:04=A0am, Jeff Cunningham <j...@sover.net> wrote:
> Dale wrote:
> > Hello,
> > I'm designing several Xilinx FPGAs and CPLDs and I was wondering if
> > there is a way to set the way ISE encodes state machines other than in
> > project navigator? =A0I'd like to be able to set it in the VHDL file or
> > in the UCF. =A0It's really a quality control problem. =A0As the project=
 is
> > touched by many people and as it's upgraded to newer versions of ISE
> > software the encoding method seems to get changed. =A0I want to be able
> > to guarantee that it's set to what I want it to be set to.
> > Thanks in advance for the help.
>
> > Dale
>
> type state_type is (foo, bar, ...);
> attribute syn_enum_encoding of state_type: type is "onehot";
> signal state: state_type;
>
> -Jeff

Jeff, thanks for the help.  When I do that I get the following error.

ERROR:HDLParsers:3312 - "C:/Projects/HAL/Hardware/FPGA_B/trunk/
ADC_Audio.vhd" Line 51. Undefined symbol 'syn_enum_encoding'.

Do I need to include a library or something?

Thanks.

On Nov 7, 9:14 am, Dale <dale.prat...@gmail.com> wrote:
> On Nov 7, 11:04 am, Jeff Cunningham <j...@sover.net> wrote:
>
>
>
> > Dale wrote:
> > > Hello,
> > > I'm designing several Xilinx FPGAs and CPLDs and I was wondering if
> > > there is a way to set the way ISE encodes state machines other than in
> > > project navigator?  I'd like to be able to set it in the VHDL file or
> > > in the UCF.  It's really a quality control problem.  As the project is
> > > touched by many people and as it's upgraded to newer versions of ISE
> > > software the encoding method seems to get changed.  I want to be able
> > > to guarantee that it's set to what I want it to be set to.
> > > Thanks in advance for the help.
>
> > > Dale
>
> > type state_type is (foo, bar, ...);
> > attribute syn_enum_encoding of state_type: type is "onehot";
> > signal state: state_type;
>
> > -Jeff
>
> Jeff, thanks for the help.  When I do that I get the following error.
>
> ERROR:HDLParsers:3312 - "C:/Projects/HAL/Hardware/FPGA_B/trunk/
> ADC_Audio.vhd" Line 51. Undefined symbol 'syn_enum_encoding'.
>
> Do I need to include a library or something?
>
> Thanks.

Typo; try this:

attribute SYN_ENCODING of state_type: type is "onehot";

-or-

attribute type_encoding_style of state_type: type is "onehot";

One of those should work,
Alex

Thanks for all your input.  I'm still not sure if I am where I need to
be.

I have the following and it synthesizes.

	type State_Machine is (S0,S1,S2,S3,S4,S5,S6,S7);
	attribute syn_enum_encoding: string;
	attribute syn_enum_encoding of State_Machine: type is "onehot";
	signal FSM_0		: State_Machine;

Then I changed the "onehot" to "jibberish" for an experiment.  It sill
synthesizes.  So, what effect does the above syntax really have?  Does
it do anything?

Dale wrote:

> I'm designing several Xilinx FPGAs and CPLDs and I was wondering if
> there is a way to set the way ISE encodes state machines other than in
> project navigator?  I'd like to be able to set it in the VHDL file or
> in the UCF.  It's really a quality control problem. 

It is possible to write synthesis code
such that the encoding selection
does not affect the fpga operation.

       -- Mike Treseler

On Fri, 7 Nov 2008 08:45:59 -0800 (PST)
Dale <dale.prather@gmail.com> wrote:

> Thanks for all your input.  I'm still not sure if I am where I need to
> be.
> 
> I have the following and it synthesizes.
> 
> 	type State_Machine is (S0,S1,S2,S3,S4,S5,S6,S7);
> 	attribute syn_enum_encoding: string;
> 	attribute syn_enum_encoding of State_Machine: type is
> "onehot"; signal FSM_0		: State_Machine;
> 
> Then I changed the "onehot" to "jibberish" for an experiment.  It sill
> synthesizes.  So, what effect does the above syntax really have?  Does
> it do anything?

Then that might not be the right attribute.  Thing to remember about
passing attributes to the synthesizer is that (far too) many of them
are synthesizer specific.  I didn't see you mention what synthesis
tool your're using, but if you're using XST, then you want:

    type State_Machine is (S0,S1,S2,S3,S4,S5,S6,S7);
    signal FSM_0 : State_Machine;
    attribute fsm_encoding : string;
    attribute fsm_encoding of FSM_0 : signal is "one-hot";

Note that not only is the attribute name different, but for some
unfathomable reason it's applied to the signal, rather than to the type.

-- 
Rob Gaddi, Highland Technology
Email address is currently out of order

Yes, I'm using XST.  I'm using a Spartan 3.  I took your suggestion,
Rob and again replaced "onehot" with garbage and it still synthesized.
Any chance that attribute is invalid with a spartan 3?  I "think" I
read that somewhere.
Thanks.

On Fri, 7 Nov 2008 10:00:36 -0800 (PST)
Dale <dale.prather@gmail.com> wrote:

> Yes, I'm using XST.  I'm using a Spartan 3.  I took your suggestion,
> Rob and again replaced "onehot" with garbage and it still synthesized.
> Any chance that attribute is invalid with a spartan 3?  I "think" I
> read that somewhere.
> Thanks.

Not at all.  I use Spartan 3s, and have successfully used that
attribute to force the encoding.

One thing is that "onehot" is just as much garbage as "asdfhalksdjfh";
XST wants "one-hot".  In the 10.1 documentation, FSM_ENCODING is
covered in xst.pdf, page 370, with a full list of what options it
supports.

I'm not 100% sure that, if you specify an invalid encoding type, that
it will throw an error rather than just assume "auto" and keep right on
going.  What you should try is asking it for "one-hot" and for one of
the other defined types, then looking through the synthesis report file
and seeing how it got encoded.  There'll be a block of text beginning
with the phrase

  Found finite state machine

down in the HDL synthesis section, and it'll tell you the encoding
style that it used.

-- 
Rob Gaddi, Highland Technology
Email address is currently out of order

" Found finite state machine
down in the HDL synthesis section, and it'll tell you the encoding
style that it used. "

Great idea.  That's solid proof.  I'm on it.