FPGARelated.com
Forums

Spartan-6

Started by Antti January 23, 2009
On Jan 23, 4:49 am, "Symon" <symon_bre...@hotmail.com> wrote:
> "Uwe Bonnes" <b...@elektron.ikp.physik.tu-darmstadt.de> wrote in message > > news:glc2p3$er6$1@lnx107.hrz.tu-darmstadt.de... > > > Antti <Antti.Luk...@googlemail.com> wrote: > >> it seems that first references to the upcoming Spartan family are in > >> the wild already > > >>http://www.linkedin.com/in/ericschristiansen > > >> I assume the spartan-6 mentioned there is not a typo > >> (actually i am almost sure it isnt) > > > I neither find XILINX. spartan or fpga mentioned in that resume. > > Look harder? Try CTRL-F ? > > "o Control structure for the digital portion of the transceiver uses an > instantiated microBlaze processor running in a Xilinx Spartan 6 FPGA > o Component selection for the transceiver Common Public Radio Interface > (CPRI) > =A7 Selected SFP+ module used for the optical interface, and a Spartan 6 =
FPGA
> running CPRI IP to handle the framing, mapping, and interleaving function=
s "
> > What happened to 4 & 5? > HTH., Syms.
I guess the felt the spartan and virtex names needed to be on the same level. Are they really bringing both out at the same time? That seems pretty extreme. I remember when at the 90 nm node they brought out the Spartan 3 first because they thought the cost advantage was more important in the "value" parts. Then they ignored the Spartan family and brought out the Virtex at 65 nm node because it was more cost effective to amortize the investment over the higer price chips. I wonder if the huge effort of bringing both out is going to pay off given the current economic situation. I'm sure this took a huge investment and if they don't sell enough chips, it maybe a case of very bad timing for Xilinx resulting in loss of market share. They say timing is everything. Rick
On Jan 30, 6:43=A0pm, -jg <Jim.Granvi...@gmail.com> wrote:
> > What happened to 4 & 5? > > Looks like Xilinx marketing want to 'resync' as the Virtex 6 and > Spartan 6 > (and hey, it's a number =A0higher than Altera so that's worth something > in their > world, right ;) > > Anyone seen package choices for Spartan 6 yet ? > > Are Xilinx going to push prices, or leave the sub $1 / Low power area > to Actel ?
I sure wish they would support the smaller leaded packages. A decent sized chip in a 100 pin QFP would be so nice; low price, easy assembly and good access to the pins for debug. I don't get why they haven't done this before. Every I/O adds cost. They won't get under $10 in moderate quanties until they pick some better packages. Rick
On Jan 31, 8:06=A0am, rickman <gnu...@gmail.com> wrote:
> On Jan 30, 6:43=A0pm, -jg <Jim.Granvi...@gmail.com> wrote: > > > > What happened to 4 & 5? > > > Looks like Xilinx marketing want to 'resync' as the Virtex 6 and > > Spartan 6 > > (and hey, it's a number =A0higher than Altera so that's worth something > > in their > > world, right ;) > > > Anyone seen package choices for Spartan 6 yet ? > > > Are Xilinx going to push prices, or leave the sub $1 / Low power area > > to Actel ? > > I sure wish they would support the smaller leaded packages. =A0A decent > sized chip in a 100 pin QFP would be so nice; low price, easy assembly > and good access to the pins for debug. =A0I don't get why they haven't > done this before. =A0Every I/O adds cost. =A0They won't get under $10 in > moderate quanties until they pick some better packages. > > Rick
Sorry Rick I can not comment in public. I hope it all be known on monday. I have some comments, i make them public as soon as the info is no longer under NDA (that is i can comment on what xilinx has made public itself) Antti
On 31 Jan, 07:01, Antti <Antti.Luk...@googlemail.com> wrote:
> On Jan 31, 8:06=A0am, rickman <gnu...@gmail.com> wrote: > > > > > On Jan 30, 6:43=A0pm, -jg <Jim.Granvi...@gmail.com> wrote: > > > > > What happened to 4 & 5? > > > > Looks like Xilinx marketing want to 'resync' as the Virtex 6 and > > > Spartan 6 > > > (and hey, it's a number =A0higher than Altera so that's worth somethi=
ng
> > > in their > > > world, right ;) > > > > Anyone seen package choices for Spartan 6 yet ? > > > > Are Xilinx going to push prices, or leave the sub $1 / Low power area > > > to Actel ? > > > I sure wish they would support the smaller leaded packages. =A0A decent > > sized chip in a 100 pin QFP would be so nice; low price, easy assembly > > and good access to the pins for debug. =A0I don't get why they haven't > > done this before. =A0Every I/O adds cost. =A0They won't get under $10 i=
n
> > moderate quanties until they pick some better packages. > > > Rick > > Sorry Rick I can not comment in public. I hope it all be known on > monday. > I have some comments, i make them public as soon as the info is no > longer under NDA > (that is i can comment on what xilinx has made public itself) > > Antti
I just had an email from Xilinx announcing the Virtex-6 and Spartan-6: http://www.xilinx.com/products/v6s6.htm Leon
On 31 Jan, 06:06, rickman <gnu...@gmail.com> wrote:
> On Jan 30, 6:43=A0pm, -jg <Jim.Granvi...@gmail.com> wrote: > > > > What happened to 4 & 5? > > > Looks like Xilinx marketing want to 'resync' as the Virtex 6 and > > Spartan 6 > > (and hey, it's a number =A0higher than Altera so that's worth something > > in their > > world, right ;) > > > Anyone seen package choices for Spartan 6 yet ? > > > Are Xilinx going to push prices, or leave the sub $1 / Low power area > > to Actel ? > > I sure wish they would support the smaller leaded packages. =A0A decent > sized chip in a 100 pin QFP would be so nice; low price, easy assembly > and good access to the pins for debug. =A0I don't get why they haven't > done this before. =A0Every I/O adds cost. =A0They won't get under $10 in > moderate quanties until they pick some better packages. > > Rick
TQ144 is the smallest Spartan-6. Leon
Leon <leon355@btinternet.com> wrote:

> TQ144 is the smallest Spartan-6.
... and the onle non-BGA -- Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
On Feb 2, 8:33=A0pm, Uwe Bonnes <b...@elektron.ikp.physik.tu-
darmstadt.de> wrote:
> Leon <leon...@btinternet.com> wrote: > > TQ144 is the smallest Spartan-6. > > ... and the onle non-BGA > -- > Uwe Bonnes =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0b...@elektron.ikp.physik.tu-dar=
mstadt.de
> > Institut fuer Kernphysik =A0Schlossgartenstrasse 9 =A064289 Darmstadt > --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
it could be that there is one BIG client who needs this package this also explains why it was in initial offering for the S3A as only non-BGA (at initial announcment of s3a) Antti
Antti wrote:
> On Feb 2, 8:33 pm, Uwe Bonnes <b...@elektron.ikp.physik.tu- > darmstadt.de> wrote: >> Leon <leon...@btinternet.com> wrote: >>> TQ144 is the smallest Spartan-6. >> >> ... and the onle non-BGA >> -- >> Uwe Bonnes b...@elektron.ikp.physik.tu-darmstadt.de >> >> Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt >> --------- Tel. 06151 162516 -------- Fax. 06151 164321 ---------- > > it could be that there is one BIG client who needs this package > this also explains why it was in initial offering for the S3A > as only non-BGA (at initial announcment of s3a) > > Antti
Hi, It might be the only TQ package that has a hope in hell of having decent SI performance with the rise times of these new parts. I'd suggest only QFNs would be an alternative to the BGA packages. I see 3.3V logic has gone from the V6 parts. Cheers, Syms.
On Feb 2, 2:11=A0pm, "Symon" <symon_bre...@hotmail.com> wrote:
> Antti wrote: > > On Feb 2, 8:33 pm, Uwe Bonnes <b...@elektron.ikp.physik.tu- > > darmstadt.de> wrote: > >> Leon <leon...@btinternet.com> wrote: > >>> TQ144 is the smallest Spartan-6. > > >> ... and the onle non-BGA > >> -- > >> Uwe Bonnes b...@elektron.ikp.physik.tu-darmstadt.de > > >> Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt > >> --------- Tel. 06151 162516 -------- Fax. 06151 164321 ---------- > > > it could be that there is one BIG client who needs this package > > this also explains why it was in initial offering for the S3A > > as only non-BGA (at initial announcment of s3a) > > > Antti > > Hi, > It might be the only TQ package that has a hope in hell of having decent =
SI
> performance with the rise times of these new parts. I'd suggest only QFNs > would be an alternative to the BGA packages. I see 3.3V logic has gone fr=
om
> the V6 parts. > Cheers, Syms.
The last time I looked at a Xilinx part, the edge rates were programmable. Besides, if you are in a 100 pin package, you don't have to provide for ground currents of 200 pins. Most will provide 60 some I/Os with around 6 to 8 I/Os per ground and power pin pair. It is the high pin count packages that have trouble with ground bounce and fast edge rates that have trouble with SI issues. I have a current design that is using a 100 QFP with a 3000 LUT part. The initial design is using around 2000 of those LUTs. If I need to expand the design, which may be an enhancement request from the customer, I may not be able to provide it without going to a new package which will raise the cost. It would be nice to have choices of chips in the small packages without paying more for BGAs. The other choice in this case is to remove the FPGA and use an MCU/DSP with a small CPLD for the specialized hardware. This won't be more expensive in recurring costs, but will have higher development costs of course. The QFNs are an option, but there are still few in low pin counts which is what drives the part cost from what I have been told. Rick
On Fri, 30 Jan 2009 15:43:10 -0800 (PST), -jg
<Jim.Granville@gmail.com> wrote:

|> What happened to 4 & 5?
|
|Looks like Xilinx marketing want to 'resync' as the Virtex 6 and
|Spartan 6
|(and hey, it's a number  higher than Altera so that's worth something
|in their
|world, right ;)
|
|Anyone seen package choices for Spartan 6 yet ?
|
 try this link

http://www.xilinx.com/products/v6s6.htm

james