Verify failed between adress... problem

Hello,

I have a simple uC/OS II system with SRAM, LEDs, switches and 2 tasks
as in the original example running on DE2 board. Both tasks
successfully print the message to JTAG UART when the .sop file is
generated with subscription version of the tools. However, when I
regenerated it with Web edition, I started getting the following
error:

Verifying 00080000 ( 0%)
Verify failed between address 0x80000 and 0x8FFFF
Leaving target processor paused

Reading from the forums, it is the problem with SRAM. 0x80000 is the
start of its memory range. People mentioned problems with timing for
SDRAM and tweaking settings, but SRAM for DE2 board should be already
properly configured. The configuration screen is plain simple too--
there is only a selection for DE2.

Both, Subscription and Web editions are 8.1. The University Cores are
right in the project directory, so they are the same (http://
www.altera.com/education/univ/materials/ip-cores/unv-ip-cores.html).

Do you know what might be the issue? Most of the time I do not have
access to Subscription version, so I have to figure this problem out.

Thanks